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ARM Compiler toolchain v4.1 patch 6

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The ARM Compiler toolchain v4.1 patch 6 (build 894) is intended for use with ARM RVDS v4.1 products. It can be used to update RVDS 4.1 Standard, Professional or Evaluation installation, whether previously patched or an original installation. It is NOT compatible with other releases of RVCT/RVDS.

This patch consists of updated ARM Compiler toolchain v4.1 compiler, linker, assembler, fromelf, and armar program executables, include files and C/C++ libraries.

Enhancements since 4.1p5

Compiler (armcc)

  • Support for the Marvell PJ4 core has been added. This is enabled with --cpu PJ4 and --cpu PJ4.no_vfp [SDCOMP-15525]

OS Platforms

This patch has been tested on the following supported platforms:

  • Windows 7 Professional Edition, 32-bit & 64-bit
  • Windows 7 Enterprise Edition, 32-bit & 64-bit
  • Windows XP SP2, 32-bit & 64-bit
  • Windows XP SP3, 32-bit
  • Windows Vista Business Edition SP1, 32-bit & 64-bit
  • Windows Vista Enterprise Edition SP1, 32-bit & 64-bit
  • Windows Server 2003 32-bit & 64-bit
  • Red Hat Linux Enterprise 4 for x86, 32-bit & 64-bit
  • Red Hat Linux Enterprise 5 for x86, 32-bit & 64-bit 

In addition, the patch has been tested on the following non-supported platforms:

  • Windows 2000 SP4
  • SUSE Linux 9.2
  • Ubuntu Linux 8.10

Installation Instructions

This patch is not supplied with an automatic installer. The included files should be unpacked and copied over the files in an existing installation. Full installation instructions are provided in the "readme.txt" file supplied in the archive.

Corrections since 4.1p5

Assembler (armasm)

  • When assembling an empty section with --exceptions, the assembler could generate incorrect exception information for following sections. This has been fixed. [SDCOMP-15596]
  • The assembler would not fault a Thumb ADD instruction in an IT block that writes to the PC when it is not the last instruction in the IT block. This UNPREDICTABLE instruction is now correctly diagnosed with error A1603E. [SDCOMP-15593]

Compiler (armcc)

  • A memcpy-like loop that reads the first element of the source buffer as the length, when compiled with -O2 -Otime, could be incorrectly transformed so that the first element of the buffer would be repeated in the destination. This has been fixed. [SDCOMP-16337]
  • If RRX shift producing code (for example a 64bit left shift of 1) was used as an operand to an ALU operation, where the other operand could corrupt PSR, the compiler could produce incorrect results. This has been corrected. [SDCOMP-16071]
  • In rare circumstances, when reading an element of a structure after a full copy to this structure, the compiler could generate incorrect code that would read the incorrect offset into the structure. This has been corrected. [SDCOMP-15976]
  • The compiler would previously always use a shared return sequence from a function when --no_conditionalize was used. It will now use multiple return sequences when this will reduce the number of branches executed at runtime. [SDCOMP-15942]
  • When compiling for Thumb, loads and stores could be incorrectly scheduled after a NOP scheduling barrier. This has been fixed. [SDCOMP-15928]
  • The compiler could sometimes incorrectly remove assignments to members of static structures with the __packed attribute and unaligned fields. This has been corrected. [SDCOMP-15797]
  • A defect has been fixed in the compiler where the use of a postincrement operator in a comparison against zero in a loop could be incorrectly optimized to be true on every iteration. [SDCOMP-15697] 
  • A defect has been fixed where the compiler could incorrectly remove an unaligned write to a member of a struct larger than 32 bytes on the stack if the only use of it was in a memcpy and the target didn't support unaligned memory access. [SDCOMP-15618]
  • The compiler could crash when a variable of a class type was declared, that contained both:
    • A member which needed dynamic construction
    • An anonymous bitfield
    This has now been fixed. [SDCOMP-14356]
  • A compiler would give a spurious error #2897: Cannot encode instruction on inline assembly instructions with a shift of LSR #0. This has been corrected. [SDCOMP-14349]
  • The compiler could crash in some unusual circumstances, typically on Windows, when compiling C++ without the --no_vfe option. This has been corrected. [SDCOMP-14220]
  • When intrinsics or inline assembly were used, the compiler could generate incorrect code for handling Q or GE flags or spurious warnings: C3007E: Uninitialised or corrupted use of PSR. This is now fixed. [SDCOMP-11798]

Linker (armlink)

  • In rare circumstances the linker could corrupt branch instructions when using a combination of:
    • RW compression
    • --callgraph or --feedback options
    • references to the linker generated Load Address Symbols of an Execution Region that is dependent on the effect of compression. For example Load$$ER_RW$$Base and Load$$ER_RW$$Limit
    • The Section making references to the Linker generated symbols does not have all of its branch relocations before any non-branch relocation
    This has now been fixed. [SDCOMP-15822]
  • A compiler may place read-only strings in string merge sections. These sections have flags that include SHF_MERGE and SHF_STRINGS. A linker is permitted to share strings that are present in string merge sections. When strings are merged the linker must account for the changes in the instructions and data that reference the original string. The linker may incorrectly account for the merging process when: 1.) The instructions that access the shared string are MOVT and MOVW 2.) The relocations on the MOVT and MOVW are present in a relocation section with type SHT_REL. The ARM tools do not generate these relocations. Third party tools such as the GNU tools may generate these relocations. 3.) A string in section S1 is merged to a string in section S2 where the string in S2 is at a non-zero offset from the base 4.) A certain combination of the final base address of S2 and the offset occurs The result will be that the combination of MOVT and MOVW instructions is 0x10000 below where it should be.

    This has now been fixed. The linker will correctly handle MOVT and MOVW relocations to sections with flags including SHF_MERGE and SHF_STRINGS. When the relocation section has type SHT_REL [SDCOMP-15700]
  • The linker could generate the error Execution interrupted due to an illegal storage access. when an execution region has a larger than predicted number of veneers. This has been fixed. [SDCOMP-15583]

ARM Compiler toolchain 4.1 patch5 (b791)

Enhancements since v4.1p4

Compiler (armcc)

  • An option has been added to control the generation of conditionalized instructions.

    • --no_conditionalize will disable the generation of conditionalized instructions
    • --conditionalize will allow the generation of conditionalized instructions

    The default behaviour is to emit conditionalized instructions based on the --cpu option. [SDCOMP-15107]

  • Support for the ARM SecurCore™ SC000 processor has been added. This is enabled with --cpu=sc000 [SDCOMP-15550]

Format Converter (fromelf)

  • A new option has been added to fromelf. --force_import takes a list of symbols and allows the conversion of each locally referenced symbol to a globally undefined symbol. For each symbol in the input list, --force_import :

    • Removes the symbol from the static symbol table.
    • Changes the dynamic symbol entry to have default visibility and be undefined with value 0. [SDCOMP-15339]

Linker (armlink)

  • Two command line options have been added to give more control over the generation of BLX instructions. --no_blx_arm_thumb controls whether the linker can generate a BLX instuction for ARM to Thumb calls. --no_blx_thumb_arm controls whether the linker can generate a BLX instruction for Thumb to ARM calls. These options default to allowing BLX instructions to be generated. [SDCOMP-14942]

Corrections since v4.1p4

Compiler (armcc)

  • 'Q' flag handling has been improved. [SDCOMP-11291]
  • Instances of internal faults 0x86934f,0x6f65fa and 0x3a34f4 have been corrected. [SDCOMP-11542], [SDCOMP-11749], [SDCOMP-13943]
  • The compiler has been updated to generate correct code for bitbanded structs. This bug was only observable when compiling some test cases only at O0 optimization level. [SDCOMP-11749]
  • A ternary condition could have one of its expressions evaluated before its condition. This could result in unsafe memory accesses if, for eaxmple, the expression is a memory access and the condition performs a bounds check. [SDCOMP-14329]
  • On ARM v7M and v7EM processors, LDRD/STRD instructions are not single-copy atomic. The compiler now generates two LDR/STR instructions to access a 64-bit volatile data for these processors. [SDCOMP-14812]
  • When using vectorization, the compiler would sometimes generate an incorrect shift when combined with conditional execution. [SDCOMP-14855]
  • In rare circumstances, if the compiler generated an LDM or STM with writeback, it was possible that later loads or stores using the same base would have incorrect offsets. This has been fixed. [SDCOMP-14866]
  • When doing a signed 64-bit constant multiply, where the 64-bit constant is INT32MAX > x <= UINT32MAX, the compiler could generate incorrect code for this, giving incorrect results. [SDCOMP-14914]
  • A defect has been fixed where the compiler would incorrectly transform code that performs a right-shift of a 64-bit value followed by a bitwise-and of certain literal values. [SDCOMP-15020]
  • Warning: #68-D: integer conversion resulted in a change of sign was incorrectly generated in some cases. This has been corrected. [SDCOMP-15096]
  • When inlining a function where the caller passes a non word aligned pointer as an argument, and the callee dereferences this pointer, the compiler could sometimes access the pointer with an incorrect offset. [SDCOMP-15239]
  • At high optimization levels with the option --no_allow_fpreg_for_nonfpdata specified, the compiler could still generate NEON code for an unaligned memcpy of small size. This has been fixed. [SDCOMP-15289]
  • A defect in the inline assembler that caused BKPT instructions not to be generated has been corrected. [SDCOMP-15303]
  • When compiling with --vectorize, the compiler could incorrectly unroll a vectorized loop, such that offsets of arrays would be incremented too many times. This has been corrected. [SDCOMP-15320]
  • In very rare circumstances, in a function that uses a register but doesn't set it, so doesn't push it onto the stack (for example using an undefined value), later LDM/STM instructions could corrupt this register. This has been corrected. [SDCOMP-15344]
  • In certain circumstances, where an OR between two consecutive signed short or char array accesses is created, the compiler could incorrectly optimize this into one word/short array access, ignoring the effects of sign extension. [SDCOMP-15358]
  • Warning: #68-D: integer conversion resulted in a change of sign was incorrectly generated in some cases. This has been corrected. [SDCOMP-15365]
  • The compiler could generate internal fault 0x8d2481 when compiling for Cortex-M processors and using Profile-Guided Optimization (--profile). This has now been fixed. [SDCOMP-15407]

Libraries

  • The library symbol __fpl_infinity had default visibility. This should not be visible and is now hidden. [SDCOMP-15318]

ARM Compiler toolchain 4.1 patch 4 (b713)

Enhancements since ARM Compiler toolchain 4.1 patch 3 (b631)

  • The tools now support the Cortex-R5 and Cortex-R5F processors. [SDCOMP-12771]
  • Since version 4.1 of the ARM Compiler, the register allocator has been extended to use floating point registers to hold integer data type values, in order to maximize the use of registers. The option --no_allow_fpreg_for_nonfpdata has been provided to stop the compiler from using floating point registers for integer data. [SDCOMP-13648]

Corrections since ARM Compiler toolchain 4.1 patch 3 (b631)

Assembler (armasm)

  • A defect has been fixed where VLDR and VSTR instructions with invalid data size specifiers were not faulted. Error A1836E is now reported when this occurs, but can be suppressed if the old behaviour is relied upon. [SDCOMP-12949]
  • A defect has been fixed where invalid data size specifiers on VLDM/VSTM were silently accepted and ignored, and some valid data size specifiers for these instruction were faulted. Using invalid data-type specifiers on VLDM/VSTM will now result in error A1837E being reported. This error can be downgraded if the old behaviour is relied upon. [SDCOMP-12982]

Compiler (armcc)

  • Using a pointer cast to reinterpret a signed short or char as an unsigned one, e.g. ss = (signed short)&us; could fail to sign-extend the answer correctly when it was next widened to an int. This is now fixed. [SDCOMP-13350]
  • Under certain circumstances, when using -O3 -Otime, users might see Internal fault: [0x07e885]. This issue has now been resolved. [SDCOMP-13368]
  • At -O3 -Otime the loop optimizer can incorrectly transform a for loop containing a pointer stepping through an array. If the pointer is initialized to the address of a non-zero element of the array, then the loop optimizer may incorrectly initialize the pointer to the first element of the array. This has now been fixed. [SDCOMP-13370]
  • When a file was compiled at -O3 -Otime, the --remove_unneeded_entities option could alter the actual code generated in addition to the debugging information. It now has no effect on the executable output. [SDCOMP-13519]
  • A long-standing bug in the compiler has been fixed where the volatile qualifier is not respected in inline assembly load and store instructions. [SDCOMP-13572]
  • In rare circumstances, the compiler could produce incorrect code when compiling a NULL check followed by an instruction with conditional execution. [SDCOMP-13703]
  • In 4.1 Patch 3 (build 631), inline assembly containing PKHTB instructions without a shift (or with a shift of 0) have been erroneously faulted with compiler error #2897. This is now fixed. [SDCOMP-13245]
  • When calling a function returning a structure which is actually passed in as a pointer, armcc could have ignored aliasing issues which would have mandated using a temporary variable, live during the function call. This no longer happens. [SDCOMP-13372]
  • The compiler did not always emit an out of line definition for a compiler-generated nontrivial destructor exported via dllexport. This is now fixed. [SDCOMP-13403]
  • When compiling for a processor that supports unaligned accesses, and unaligned accesses are not disabled, the 4.1 Patch 3 compiler (build 631) may generate internal fault 0xabc3e8 when compiling code that involves shifting the bytes of an integer into an 4 byte sized char array. This is now fixed. [SDCOMP-13183]
  • When compiling with -O3 -Otime and when processing an array within a loop, it was possible for compiler to generate an incorrect reference to __aeabi_memmove causing the wrong results. This issue has been fixed. [SDCOMP-13921]
  • If a variable which is assigned the result of an __ldrex or __ldrt intrinsic, is used in subsequent expressions which only read a portion of the variable, the compiler could incorrectly emit a read of the whole variable. This issue is now fixed. [SDCOMP-14251]
  • When compiling large switch statements in Thumb mode, if the variable used in the switch is used in or after the switch block, the compiler could use the incorrect value for this variable. This could happen at all optimization levels.  This issue is now fixed. [SDCOMP-14043]  
  • The compiler now works around Cortex-M3 erratum 602117 involving LDRD when the base register is also the first loaded register. The C/C++ libraries have also been rebuilt to avoid these instructions. [SDCOMP-13339]
  • A compiler crash when using options -O3 and -Otime has been fixed. [SDCOMP-13163]

Libraries

  • The memcmp and strncmp functions would sometimes return results of the wrong sign:
    • if running on either a big-endian platform, or a little-endian one with the REV instruction available
    • if the two strings or memory blocks being compared were both word-aligned and had their first differing byte at an address divisible by 4
    • if the two values of the differing byte differed by at least 128.
    This is now fixed. [SDCOMP-13393]

Linker (armlink)

  • In all previous versions the linker could suffer from relocation out of range problems. This was caused by the elimination of identical exception table entries, which altered the addresses that the linker was using to calculate the branch range. This has been fixed. A side effect of the fix is that the placement of veneers within the execution region might change. If you are using the default lexical sorting algorithm you should expect to see no change. If you are using an alternative sorting algorithm to lexical, by using the --sort option you will see the linker place the veneers after the RO-CODE in the execution region. [SDCOMP-12363]

ARM Compiler toolchain 4.1 patch 3 (b631)

Enhancements since ARM Compiler toolchain 4.1 patch 2 (b561)

Compiler (armcc)

  • The ARM Compiler now supports the GNU Compiler atomic builtin functions in --gnu mode for atomic memory access. The ARM Compiler supports __sync_fetch_and_add, __sync_fetch_and_sub, __sync_fetch_and_or, __sync_fetch_and_and, __sync_fetch_and_xor, __sync_fetch_and_nand, __sync_add_and_fetch, __sync_sub_and_fetch, __sync_or_and_fetch, __sync_and_and_fetch, __sync_xor_and_fetch, __sync_nand_and_fetch, __sync_bool_compare_and_swap, __sync_val_compare_and_swap, __sync_lock_test_and_set, __sync_lock_release and __sync_synchronize for word sizes of 1, 2 and 4 bytes. [SDCOMP-11584]

Linker (armlink)

  • A new linker option --tiebreaker=<tiebreak> is available, where <tiebreak> is either creation or cmdline. A tiebreaker is used when a sorting algorithm needs a total ordering of sections. The default tiebreaker is creation, which is simply the order of creation of the section data structure within the linker. The alternative --tiebreaker=cmdline is the order that the section appears on the command line. The command line order is defined as File.Object.Section where Section is the sh_idx of the section within the object. Object is the order that the object appears within the file. File is the order that the file appears on the command line. The order that the object appears within the file is only significant if the file is static library. To alter the display of the --map file to show command line order please use the --section_index_display=cmdline switch. [SDCOMP-10525]
  • There are two new linker command line options that control placement of .ANY sections:
    • --any_sort_order=<order> where <order> is one of:
      • descending_size (sort in descending size order)
      • cmdline (sort by command line index)
      The default is descending_size.
    • --any_placement=<algorithm> where <algorithm> is one of:
      • first_fit (place Section in first ER with space, in scatter file order)
      • best_fit (place Section in ER with least free space)
      • worst_fit (place Section in ER with most free space)
      • next_fit (place Section in current ER with free space moving to next if there is insufficient space. Never back-track to previous ER)
      The default is worst_fit.
    Additionally a new info option has been added: --info any. This will output the sort order, assignment algorithm, and which sections are assigned to each execution region in the order that they are processed by the placement algorithm. [SDCOMP-10526]

User Notice

  • The Link Time Code Generation (--ltcg) feature is being considered for redesign to improve the effectiveness of its interprocedural analysis. While many users benefit from using --ltcg today, we feel that changes to this feature's architecture may potentially benefit a broader set of use cases. We encourage customers to continue using --ltcg where they see benefit, however please note that we are deferring any defect corrections or enhancements related to LTCG until we have completed our internal investigation and potential redesign of the feature. As an alternative to --ltcg we encourage users to investigate the --multifile option. --multifile also performs interprocedural analysis, but on a reduced set of input files (10 or less is recommended).

Corrections since ARM Compiler toolchain 4.1 patch 2 (b561)

Compiler (armcc)

  • With command line switches -O3 -Otime, when a signed constant with minimum possible value was propagated into an addition, an extra negation could be generated. This no longer happens. [SDCOMP-10825]
  • With command line switches -O3 -Otime, a declaration-initializer could be reordered with a function call that may have side-effects. This reordering no longer occurs. [SDCOMP-10826]
  • In certain situations storing the address of a recursive data structure inside itself (or use of pointer arithmetic to achieve a similar end) would cause an UNPREDICTABLE store instruction to be generated. This has now been fixed. [SDCOMP-10901]
  • In rare cases, at optimization levels -O2 -Otime and -O3 -Otime the compiler could generate code for a function such that some paths through the function would not save registers on the stack on entry, but would try to restore them from the stack when returning. This could lead to corruption of the stack pointer. This has been fixed. [SDCOMP-10926]
  • In rare circumstances, when using --thumb and 64-bit subtraction, the compiler could generate internal fault 0x2c8c8b. [SDCOMP-10931]
  • At optimization level -O3 -Otime, the compiler could generate wrong code when a declaration block contains a function call as an initializer and a dereferenced pointer as an initializer, and the function call changes the value pointed to by the pointer. This has been fixed. [SDCOMP-10948]
  • At optimization level -O3 -Otime, the compiler could generate incorrect code for while loops that have a fixed iteration count, where the loop condition involves comparing unsigned integers with constants other than zero, and the number of loop iterations is small. This has been fixed. [SDCOMP-11083]
  • In certain situations at optimization level -O2 and above, the value of local variables at a setjmp callsite after a longjmp call in another function would be incorrect. This has been fixed. [SDCOMP-11289]
  • A cause of internal faults 0x79ad6d and 0x751671 has been fixed. [SDCOMP-12118]
  • At -O3 -Otime, the compiler could incorrectly manipulate a conditional expression which calculates the absolute difference between two unsigned values (for example (a >= b) ? a-b : b-a). This has been fixed. [SDCOMP-12144]
  • At -O3 -Otime, the compiler could make incorrect assumptions about the wraparound behaviour of unsigned loop indices, leading to incorrect code generation. This has been fixed. [SDCOMP-12265]
  • Using NEON intrinsics, the compiler could incorrectly treat VBIC and VORN as commutative operations when the first argument was a static constant. This has been fixed. [SDCOMP-7319]
  • The compiler could generate wrong code for a function with local static variables of types short or char, at optimization level -O1 or above. This has been fixed. [SDCOMP-7335]
  • The compiler could generate code at -O3 -Otime where a loop accessing pointers to pointers would dereference out of date values when unrolled. This has been fixed. [SDCOMP-7343]
  • The compiler could generate code at -O3 -Otime that skipped the first iteration of an unrolled while loop controlled by a variable decrement at the end of the loop. This has been fixed. [SDCOMP-7344]
  • At -O3 -Otime, when inlining functions with an implicit cast upon returning, the compiler could sometimes incorrectly remove the necessary cast. This has been fixed. [SDCOMP-7347]
  • At -O3 -Otime a pointer variable declared through multiple typedefs could be treated with the incorrect number of indirections. This has been fixed. [SDCOMP-7350]
  • At -O3 -Otime the compiler can apply a loop-rotation transformation with the intent of prefetching data for the next iteration. This could result in invalid reads past the end of an array. The compiler will now peel initial and final iterations (as necessary) from the main loop body so that the invalid reads no longer occur. [SDCOMP-7497]
  • A new option, --[no_]intermediate_object_files, has been added. In a combined compile-and-link step where -c is not specified, when --no_intermediate_object_files is specified the compiler will use temporary files for the compiled object files and remove them after the link, and the object files will not be created in the current directory as normal. The default is --intermediate_object_files (preserving the previous behaviour) for normal armcc invocation, and when using GCC command-line translation the default is --no_intermediate_object_files. [SDCOMP-10712]
  • Some instances of internal fault 0x413ad2 when using --gnu_instrument have been fixed. [SDCOMP-10800]
  • The compiler could generate code performing bitbanded accesses through a pointer in a struct, for example s1.bitbanded_object_ptr->bitfield, which the documentation says is not permitted. This has been fixed. [SDCOMP-11315]
  • At optimization level -O3 -Otime, the compiler could generate wrong code when a declaration block contains a function call as an initializer and a dereferenced pointer as an initializer, and the function call changes the value pointed to by the pointer. This has been fixed. [SDCOMP-10948]
  • At optimization level -O3 -Otime, the compiler could generate incorrect code for while loops that have a fixed iteration count, where the loop condition involves comparing unsigned integers with constants other than zero, and the number of loop iterations is small. This has been fixed. [SDCOMP-11083]
  • At -O3 -Otime, the compiler could incorrectly manipulate a conditional expression which calculates the absolute difference between two unsigned values (for example (a >= b) ? a-b : b-a). This has been fixed. [SDCOMP-12144]
  • At -O3 -Otime, the compiler could make incorrect assumptions about the wraparound behaviour of unsigned loop indices, leading to incorrect code generation. This has been fixed. [SDCOMP-12265]
  • At -O3 -Otime a pointer variable declared through multiple typedefs could be treated with the incorrect number of indirections. This has been fixed. [SDCOMP-7350]
  • At -O3 -Otime the compiler can apply a loop-rotation transformation with the intent of prefetching data for the next iteration. This could result in invalid reads past the end of an array. The compiler will now peel initial and final iterations (as necessary) from the main loop body so that the invalid reads no longer occur. [SDCOMP-7497]

Assembler (armasm)

  • Internal reengineering for the 4.1 release meant that the assembler became more strict about directives and instructions varying between passes of the source. This lead to some benign uses of the ELSE, ELIF and ENDIF directives being diagnosed with A1903E. ELSE, ELIF and ENDIF are now exempt from this diagnostic. [SDCOMP-10947]
  • The assembler incorrectly allowed PC-relative labels that were not reachable by the instruction encoding. This is now fixed, and an error message will bve generated. [SDCOMP-8949]
  • Error messages A1670E, A1671E and A1698E would sometimes be reported as occuring at end of the line, rather than the operand causing the error to. This is now fixed. [SDCOMP-9071]
  • For load or store instructions where the immediate offset is written as an expression that evaluated to a negative integer, the assembler would sometimes either incorrectly fault it with A1616E or silently emit incorrect code. This has been fixed. [SDCOMP-9078]

Linker (armlink)

  • The linker could incorrectly set the entry size attribute of a version definition section. This is now correctly set to zero. [SDCOMP-10617]
  • The --veneer_inject_type=pool veneer generation model required branches to veneers in the pool to be able to reach the pool limit, which is the highest possible address a veneer could take. If a branch were later found that could not reach the pool limit the linker would give error message L6828. The linker will now reduce the pool limit to accomodate the branch if it is able to fit all the veneers in the pool into the lower pool limit. Error message L6828 will only be given if the linker is unable to lower the limit. [SDCOMP-10797]
  • The linker could emit warning L6460W when a dynamic library was included in a partial link, even when using --ltcg. This warning is no longer generated in this case. [SDCOMP-10872]
  • A symdefs file allows global symbols used from the output of one link step, to be used as input into the another link step. A multiple symbol definition error L6200E can occur when the symdefs file contains global symbols defined by a section that is a member of a comdat group, and the user of the symdefs file generates the same comdat group. An example of such a symbol is a compiler helper function that is defined by both the symdefs file and the application.
    The linker will now resolve this conflict by choosing one of the symbol definitions and reject the other. The choice of which definition is chosen is controlled by the command line option --comdat_symdefs_preference=preference, where <preference> is one of symdefs or comdat. When <preference> is symdefs the linker will choose the definition from the symdefs file, when <preference> is comdat the linker will prefer the definition from the comdat group. The default <preference> is symdefs. [SDCOMP-11080]

Libraries

  • Attempting to use the scanf or fscanf functions in microlib no longer gives a link error. [SDCOMP-7946]

ARM Compiler toolchain 4.1 patch 2 (b561)

Enhancements since ARM Compiler toolchain 4.1 patch 1 (b514)

  • armlink supports matching of C++ unmangled symbol names in symbol version scripts in the same way as GNU ld. For example:
    
    VERS_2.0  {
        global:
            extern "C++" {
                ns::*;
    	    "foo::f(int, double)";
        };
        local:
            *;
    }
    
    [448263]
  • Messages for errors in predefines passed in using the --pd option in the assembler have been improved to show the predefine string being processed. [731112]
  • armlink will now attempt to open any filename mentioned explicitly in an input section selector in a linker script, if it is not already included in the link. For example: .text : { object.o(.text) } [737554]
  • The linker now supports a option --veneer_inject_type=<type>, where type can be either individual or pool. The default is individual. This option controls the veneer layout when --largeregions mode is used.
    --veneer_inject_type=individual causes the linker to place veneers so that they can be reached by the largest number of sections that use the veneer. Veneer reuse between Execution Regions is permitted. This type minimises the number of veneers that are required but disrupts the structure of the image the most.
    --veneer_inject_type=pool causes the linker to collect veneers from a contiguous range of the Execution Region and place all the veneers generated from that range into a pool placed at the end of the range. A large Execution Region may have more than one range and therefore more than one pool. This type has much less impact on the structure of image but has less opportunities for reuse as a range of code cannot reuse a veneer in another pool. The linker calculates the range based on the presence of branch instructions that the linker predicts may need veneers. A branch is predicted to need a veneer when a state change is required, or when the distance from source to target plus a contingency is > branch range. The size of the contingency can be set with the --veneer_pool_size=<size>. By default it is set to 102400 bytes. The --info veneerpools option will provide information on how the linker has placed veneer pools. [740845]
  • The ScatterAssert scatter file facility in armlink now produces a failure message incorporating the numbers being evaluated. For example:
    Error: L6388E: ScatterAssert expression (ImageLength(er1) < ImageLength(er2)) failed on line 27 : (0x608 < 0x400)
    [742874]
  • The armlink --any_contingency option has been improved to allow contingency space for possible veneers. Usage of the option is as before - however previously images requiring a lot of veneers could sometimes overflow regions with .ANY. [743029]
  • Memory map information will now be generated (if enabled with --map) even when certain scatter loading errors are encountered. [743870]
  • A missing or invalid label for branch instructions triggered diagnostic A1114E. It now causes A1112E. [744433]
  • A 64-bit version of the linker is now supplied. On systems with a 64-bit host OS, this can be used in situations where the addressable memory required by the linker exceeds that available on a 32-bit system.

Corrections since ARM Compiler toolchain 4.1 patch 1 (b514)

Compiler (armcc)

  • A cause of internal fault 0x45464 has been fixed. [718921]
  • A possible compiler crash when compiling on Windows with -O3 and -Otime has been fixed. [742234]
  • In certain situations armcc would generate incorrect code which ignored the result of a memmove. This has been fixed. [742926]
  • The compiler could generate an LDRD to a word-aligned but non-doubleword-aligned address when compiling for an architecture v5TE target. This has been fixed. [743327]
  • armcc could produce the spurious remark #679-D when using the __inline keyword, this remark is no longer produced. [743470]
  • Incorrect code could be generated when -O3 was used with a if/else construct. This has been fixed. [743585]
  • #pragma pack(n) was wrongly ignored on structure fields, resulting in incorrect unaligned accesses. This is now fixed. [743749]
  • A problem with function inlining that produced incorrect code when compiling the FFmpeg JPEG decoder with -O3 has been fixed. [744020]
  • armcc would sometimes generate incorrect code at -O3 -Otime, the iteration count for an unsigned int downcount index would sometimes be calculated incorrectly, this could occur when the loop index is unsigned and downcounts by an increment other than 1. [744070]
  • armcc would sometimes generate incorrect code at -O3 -Otime. In certain cases where array constants are used in a loop (array elements with constant values for all loop iterations), if the relationship between stores and uses of various such array constants is not clear, then loops may be optimized for scalar execution in an incorrect way. [744475]
  • armcc would sometimes generate incorrect code at -O3 -Otime, which was caused by ignoring effects of modifications to dummy arguments that are themselves used as actual arguments. Therefore this problem could potentially occur when there are nested calls (not necessarily recursive), with a constant passed in at a higher level, and one or more dummy arguments in the value-passing chain are modified. [744478]
  • In very rare cases armcc would hang and consume large amounts of memory when compiling at -O3 -Otime. This has been fixed. [744632]
  • The compiler could sometimes crash with internal fault 0x2cc72c when it was compiling very large switch statements in Thumb mode. This is now fixed. [744872]

C Libraries

  • The stdio implementation could crash when the heap runs out of memory. This is now fixed. [741270]
  • In a multithreaded program, the fgets(), gets(), fputs() and puts() functions could fail to unlock the stream's mutex if they returned due to error or EOF. They now unlock the mutex reliably. [743172]
  • Attempting to use the scanf or fscanf functions in microlib no longer gives a link error. [743330]
  • The minimal stdio implementation in microlib behaved incorrectly if _sys_seek() returned a positive value. The internal state would not be updated by fseek, and the return values of fseek and fsetpos would be incorrect. This has been fixed. [743384]
  • The Cortex-M3 C libraries had only one variant of strcmp, which depended on unaligned access. Now they also provide a variant which does not. [744183]

Assembler (armasm)

  • Message A1198E emitted when a built-in variable (for example, {TRU}) is unrecognized or mis-typed has been improved. [681868]
  • The immediate operand in "VCMP Vd,#0.0" instructions was being ignored. Any immediate or syntax was accepted without error. This is now fixed. [734850]
  • Out of range immediate offsets on LDRT, LDRBT, LDRSBT, LDRHT, LDRSHT, STRT, STRBT, STRHT instructions resulted in error A1879E. This has been corrected to report A1174E. [735111]
  • LSL with immediate zero inside an IT block in Thumb is unpredictable, but the assembler did not fault it. This is now fixed. [738167]
  • The assembler incorrectly allowed the syntax "VADDW.<dt> Qd,Qn" to be assembled without error. This is now fixed. [739503]
  • When a label is used with DCI in the assembler, the wrong value was emitted into the object code. This would cause the wrong value to be used at link-time when the code is relocated. This is now fixed and warning A1915W is raised, since DCI is not intended to be used with a relocation. [739757]
  • The assembler was not permitting the IT instruction as a pseudo-instruction in ARM on CPUs that do not have the Thumb IT instruction. This is now fixed. [740258]
  • Assembler would sometimes raise internal fault 0x277bbe rather than a real error message when bad syntax has been used. This is now fixed. [741834]
  • The assembler incorrectly allowed the NV condition code when assembling for Thumb on a CPU with the IT instruction. This is now fixed. [742879]
  • Some causes resulting in internal faults 0x06d3d3, 0x277bbe and 0x3923a1 have been fixed. [742919]
  • Two error messages were being reported incorrectly. The Thumb instruction "SUBS pc,lr,#0x100" was faulted with message A1912E when it should have been A1492E, and for targets without the "SUBS pc,lr,..." instruction, A1912E was reported instead of A1356E. This has been fixed. [742936]
  • Earlier versions of the 4.1 assembler would print the wrong range for valid shift immediate values in the error message A1482E (out-of-range shift immediate). This has been fixed. [742937]
  • The assembler would not allow VMOV.F32 and VMOV.F64 to be used with floating point literals written using the 0f_n and 0d_nn syntax. This is now fixed. [742941]
  • Some error messages generated when illegal ADC, SBC, RSB or RSC instructions are assembled have been improved. [742974]
  • Previously the assembler would diagnose error A1322E for LDR/STR pc,[pc,#n] where n is not a multiple of 4. This message should only be emitted for LDR instructions, where the result is UNPREDICTABLE. This is now fixed. [743578]
  • The assembler incorrectly allowed shifting by register in the addressing mode for PLD, PLDW and PLI instructions. This is now fixed. [743598]
  • The error message used for a branch to an unaligned destination has been changed from A1243E to A1341E to improve clarity. [743750]
  • armasm now accepts the ORN instruction in ThumbEE assembly. This was previously incorrectly rejected. [744185]
  • armasm will now accept APSR_g as a synonym for CPSR_s on all non M-profile architectures and cores. This was previously rejected on targets without the GE[3:0] PSR bits. [744187]

Linker (armlink)

  • When merging comdat groups the linker can incorrectly turn references to weak definitions in rejected groups into weak references. This can cause unused section elimination to throw away sections that should be kept. This has now been fixed. [743824]
  • armlink wildcard patterns in symbol versioning scripts are now matched with case-sensitivity. This matches the behaviour of GNU ld [744933]
  • The linker would incorrectly set the entry size attribute of a version definition section. This is now correctly set to 0. [746425]

    Librarian (armar)

    • Under Windows, armar could mishandle object file names with an explicit pathname, for example, "directory\filename.o" by mistakenly omitting the final \ character. This has been fixed. [742645]

    Format Converter (fromelf)

    • fromelf previously failed to report an error message if the syntax for selecting members of an archive (such as 'archive.a(*.o)') was used on a file which was not an archive or did not exist. Now it does. [743830]

    Multiple tools

    • The C99 complex number functions in the C library (declared in <complex.h>) have hitherto used the wrong procedure call standard in hardware FP environments. The library functions defined under their standard names (csin, ccos, cexp etc) expected their arguments in VFP registers, and the compiler generated calls to them in the same way. As a result, hardfp and softfp compiled code which called the complex library functions could not be linked together (because one or the other would try to call the library functions wrongly). This is now fixed, so that csin, ccos etc pass their arguments in integer registers, and the library also provides alternative entry points called __hardfp_csin, __hardfp_ccos etc which use VFP registers. Unfortunately, the effect of this is that existing hard-FP object code which calls the complex library functions will not function correctly when linked against the fixed libraries. The linker will issue a warning when resolving a reference to any <complex.h> function from an object whose .comment section contains an identification string from an affected build of armcc and whose .ARM.attributes section indicates that it uses the VFP variant of the AAPCS (Tag_ABI_VFP_args = 1). [743430]

    ARM Compiler toolchain 4.1 patch 1 (b514)

    Enhancements since ARM Compiler toolchain 4.1 initial release (b462)

    • It is possible to write code for the assembler that takes a different path in each pass by testing for a symbol's existence with :DEF: before its definition. Previously, this would either cause an internal fault or result in incorrect behaviour and output. Diagnostics A1908E and A1909E have been added to ensure that pass-specific behaviour is only allowed if it leads to correct behaviour. Diagnostic A1907W, which can be enabled with --diag_warning=1907, has been added to help users find the cause of the problem. [730558]
    • Diagnostic message A1492E is no longer used when the only valid value for the immediate is 0. Instead, the assembler now uses A1910E: "Immediate 0x00000001 out of range for this operation. Immediate value must be 0." [737062]
    • armlink now supports a new sorting type: --sort=LexicalState. This sorts all Thumb code before ARM code and then sorts lexically. [738501]
    • The GNU ld script keyword ABSOLUTE is now supported. [738696]
    • The GNU ld script keywords NEXT, ADDR, LOADADDR, SIZEOF, ALIGNOF, DEFINED and EXTERN are now supported. [738698]
    • armlink callgraphs give enhanced function pointer information and combine multiple calls to the same function pointer from the same section. [739763]
    • The --show_cmdline option can now be used with the ARM Linux translation options, by using -Warmcc. For example, armcc -Warmcc,show_cmdline --translate_gcc ... [740261]
    • Some syntax errors, including A1106E and A1169E, have been improved through the addition of column numbers and a caret to point to the problem characters. For example, previously the syntactically-invalid instruction "ADD r0 #1" would be diagnosed with:
      "add1.s", line 2: Error: A1106E: Missing comma
          2 00000000     ADD r0 #1
      1 Error, 0 Warnings

      Now the error looks like:

      "add1.s", line 2 (column 11): Error: A1106E: Missing comma
          2 00000000     ADD r0 #1
                               ^
      1 Error, 0 Warnings [742030]
    • If no expression was written where the assembler expected one, it would previously report "Error A1152E: Unexpected operator", and not report the column number or location on the line. For example:
      "unexp.s", line 10: Error: A1152E: Unexpected operator
          10 00000000     add r0,#,#1

      Now the assembler will report the column with a caret under the line and will, in many cases, report what it expected to find:

      "unexp.s", line 10 (column 13): Error: A1110E: Expected constant expression
          10 00000000     add r0,#,#1
                                  ^ [742074]
    • The compiler would generate 64-byte aligned BSS sections by default at -Otime, starting from version 4.1. This is now reverted back and the compiler doesn't over align the BSS section. [742389]

    Corrections since ARM Compiler toolchain 4.1 initial release (b462)

    Assembler

    • armasm now produces warning A1906W if an IT block is left unfinished at the end of the input file. Diagnostic A1471W reports on ENDFUNC and ENDP directives inside IT blocks. [732112]
    • Data types on VLDM and VSTM instructions are checked when assembling for a processor without NEON. [734858]
    • Some unpredictable LDC and STC instructions were not being diagnosed correctly in the assembler and disassembler. This has now been fixed. [735716]
    • armasm would allow the user to specify offsets in the FRAME SAVE directive that were not 4-byte aligned. These are now faulted, because they cannot be represented in the output DWARF information. [736357]
    • Assembly and disassembly of the instruction "SUB Rd,PC,#0" was incorrect. This is now fixed. [738109]
    • A regression was introduced in 4.1 where the assembler would incorrectly assemble the ADRL pseudo instruction when the distance to the address had bit 12 set. This is now fixed. [740166]
    • Internal fault produced when assembling IT.W has been fixed to report error message A1617E. [740497]

    C Libraries

    • The posix_memalign function failed to operate correctly in a multithreaded environment: depending on circumstances, it would either not lock any mutex at all, or lock a nonexistent one. [741384]

    Compiler

    • Internal fault 0x04de77 due to using --library_interface=aeabi_clib when using hardware floating-point linkage has been fixed. [737655]
    • A cause of internal fault 0xe70a0c with -g --remove_unneded_entities has been fixed. [738304]
    • Internal fault 0x2732f5 when a function of one argument declared with __svc_indirect is called has now been fixed. [739247]
    • The behaviour of bitbanding has changed slightly:
      • If a bitband object is placed outside of a bitband region (either with the at attribute or with a integer literal pointer), the compiler will take the following action:
        • If the object type has had the bitband attribute applied to it, and --bitband isn't specified on the command line, the compiler will give an error.
        • If the object type has had the bitband attribute applied to it, and --bitband is specified on the command line, the compiler will give a warning, and ignore the request to bitband.
        • If the object type hasn't had the bitband attribute applied to it, and --bitband is specified on the command line, the compiler will ignore the request to bitband.
      • In addition, the at attribute is no longer accepted on declarations with incomplete types. [740151]
    • A cause of internal fault 0x44784c at -O3 -Otime has been fixed. [741319]
    • The compiler could produce incorrect code when -O3 -Otime --vectorize is specified, for source code where there is a repeated expression involving the same array and casts on the left hand side of different assignment expressions. This is now fixed. [742023]
    • A code generation fault at -O3, which occurs when a loop without a function call accesses global or static char variables (signed or unsigned) is now fixed. [742021]

    FP Libraries

    • In a program compiled little-endian and with --fpmode=ieee_full, the normal C conversion from double to an int (by implicit or explicit casting) wrongly set the IEEE Inexact Result exception when converting the value -2^31, despite it being exactly representable in a 32-bit signed integer. [738509]

    Multiple tools

    • When producing DWARF debug information, the assembler and compiler could output CIE and FDE records that had a length that was not a multiple of four, which can cause problems for third-party debug tools. This has now been fixed to produce padding in the appropriate places. [739145]

    Linker

    • armlink now orders .fini_array sections correctly in --sysv images to ensure destructor functions are executed in the correct order. [737348]
    • armlink now supports a new command line option --any_contingency. This changes the behaviour of assignment to .ANY selectors: armlink will now count the bytes of padding that could potentially be added to the execution region to ensure correct section alignment. The actual amount of padding will not be known until all sections have been assigned, so the linker uses a worst-case estimate: (RequiredAlignment(Section) - 1) bytes of padding for each section. When a region is about to overflow due to potential padding armlink will lower the priority of the .ANY selector. This option may provide a solution to error L6220E where the overflow is due to padding. This option is off by default (armlink will not attempt to calculate padding and will strictly follow the .ANY priorities). [737995]
    • armlink will generate long branch veneers for branches from Position Independent Code in a PI Execution Region to targets in an Absolute Execution Region. By default armlink was not reusing these veneers leading to a large code-size increase. This has now been fixed and armlink will reuse these veneers when it is safe to do so. [738918]
    • The linker no longer tries to check out two licenses when linking with --ltcg. [739250]
    • armlink no longer includes the size of unused sections when calculating space remaining for .ANY selectors. [739755]
    • Under some circumstances armlink would incorrectly report .ANY sections as full when using --autoat. This has now been corrected. [740655]
    • armlink was incorrectly reporting the debug size of all input Objects as 0. For example:
      Code(inc. data)  RO Data  RW Data    ZI Data   Debug  Object Name
         28      8          0       1        100       0       test.o
      This has now been fixed, the Debug column will display correctly. [742373]

    ELF Format converter (fromelf)

    • On Windows, "fromelf -v -g", applied to an image containing a .debug_str section, could cause fromelf to crash with an illegal storage access. [740956]

    ARM Compiler toolchain 4.1 (b462) initial release

    Enhancements since RVCT 4.0, Build 771

    • The tools now support --cpu=7E-M to generate code for the 7-M architecture enhanced with DSP (saturating and 32-bit SIMD) instructions as featured in the Cortex-M4 processor. [736675]
    • A new option --branchpatch=cortex-a8_q109 has been added to work around a Cortex-A8 bug by inserting NOPs to avoid a wide branch spanning a page boundary. [736360]
    • The linker error message 6221 "<type1> region <regionname1> overlaps with <type2> region <regionname2>" has been improved, it will now report whether the overlap is a Load or Execution Address overlap and the Address ranges of each Region. [421695]
    • The linker error message 6291, given when the linker can not use the base address specified by the FIXED keyword in a scatter file has been improved. [726792]
    • A new linker option "--info=weakrefs" has been added to generate a report detailing weak references, and whether or not they have been resolved. [732434]
    • A new attribute "PROTECTED" can now be applied to load regions in scatter files. The linker will not share strings or veneers between regions marked as "PROTECTED", "OVERLAY" or "PI". [618518]

    Corrections since RVCT 4.0, Build 771

    Compiler

    • Some causes of internal faults 0xfe1945 and 0x0d9189 at -O3 -Otime have been fixed. [737716, 735852]
    • Warnings and errors have always been suppressed in system header files. They are now also suppressed in the corresponding implicitly included template implementation files. [736105]
    • In GNU C++ mode, use of compound literals (a C99/GNU extension) to initialize file-scope variables could result in runtime failures. This is now fixed. [736266]

    Assembler

    • The assembler would fail to output a 32-bit word for a DCD generated by the relocation-producing :SB_OFFSET_11_0: operator. [729400]

    Linker

    • Previously under certain circumstances armlink would fail to link images which implemented their own scatterloading mechanism using old-style region tables, exiting with "ARM Linker: Execution interrupted due to an illegal storage access". armlink will now process old-style region tables correctly. [734549]
    • armlink will now produce error message L6065E when failing to a write contiguous block larger than the maximum of 2GB. [728400]
    • armlink could assign an incorrect type to .dynstr sections, which could result in fromelf generating error Q0454E. This has been fixed. [447077]
    • Parsing of the scatter file has been improved so that base address designators of the form +offset can be used where they do not immediately follow a region name. [718672]
    • Support for ARM/Thumb synonyms (deprecated in RVCT 4.0) has been removed. Error message L6822E will be generated if these are detected. [726942]

    Libraries

    • The full Unicode wide-character ctype functions towupper() and towlower(), if enabled with #pragma import __use_utf8_ctype and #pragma import __use_full_wctype, and if compiled using --wchar32, would return the wrong answers for the character pair U+1D79 and U+A77D, which should be lower- and upper-case versions of each other. [736950]

    Fromelf

    • fromelf --bin would sometimes name an output file after an empty execution region name. It will now always use the name of the first non-empty execution region in the corresponding load region. [735346]

    Multiple tools

    • In Japanese message locales, when using --diag_style=ide, the comma between file line and column is now an ASCII comma rather than a Kanji comma. [736125]
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