Login

CoreSight Design Kits

CoreSight SoC Components Image (View Larger CoreSight SoC Components Image) CoreSight™ Design Kits provide Cortex-A, Cortex-R, and Cortex-M series processors with embedded software and allow application developers to perform on-chip debug and real-time trace resources required for optimization and debug of Cortex processor platforms.

 

 

Find out more...

CoreSight Design Kits for Cortex-A series processors (Cortex-A9, Cortex-A8, Cortex-A5) provide a complete infrastructure for optimization and debug of advanced platforms running OS and targeting applications, and requiring outstanding performance and low energy consumption.

Architected to debug & trace heterogeneous high performance multicore systems

CoreSight Design Kits for Cortex-A series processors give:

 

 Higher visibility through fewer pins

Powerful multi core interactive debugging with real-time visibility

CoreSight for Cortex-A series processors enable developers to control (debug) and observe (trace) their Cortex-A processor-based SoC with fewer pins. 
Cortex-A processor debug and run time control can be performed with only 2 pins using the Serial Wire Debug technology or alternatively using JTAG, when highly compressed real-time trace of the cores and others system trace can be captured on-chip (ETB) or exported through a dedicated trace port (TPIU).



With the CoreSight DAP and the Embedded Cross Triggering, developers can perform powerful symmetric and asymmetric multicore debug and run-time control, while collecting time stamped CPU or system trace to analyze, optimize and debug software and hardware interaction.

Visibility of program execution on multicore SoCs

Visibility for high performance, low energy and secure systems

CoreSight trace macrocells for Cortex processors give software developers vital information on how their software executes on the platform. All Cortex-A trace macrocells are OS aware enabling development tools to deliver OS aware debug and optimization. 



The CoreSight technology supports the highest performance processors while being architected to minimize energy consumption. The CoreSight technology provides SoC architects the flexibility to implement the most power efficient debug and trace solution, by enabling multi clock and power domains debug and real-time trace.
CoreSight also makes provision for secure debug and trace, enabling provision of this vital visibility only to trusted users.

Value to different users during the life of the SoC

Re-use & standardization

CoreSight technology is in use throughout the life of the SoC, enabling silicon suppliers and OEMs to decrease cost and development risks. CoreSight can be leveraged for other components in the SoC, enabling Partners to decrease debug and trace cost and provide a standard framework across platforms. Partners can integrate their own debug and trace components in CoreSight by complying with the CoreSight architecture specification. 
Learn how CEVA DSP support the CoreSight technology

 

Today, the CoreSight technology provides on-chip visibility to software and hardware developers in many end products such handsets, mobile devices, set-top boxes and ultra-portable SmartBooks,

Public example of how CoreSight trace is used by Qt developers to optimize Qt performance

Bring values to many users during the life of your SoC

Specified by major OEMs in end products, the CoreSight technology for Cortex-A series processors delivers value to different user groups during all the phases of the SoC life cycle.  

 

Main user groups   

Main tasks enabled or accelerated by CoreSight technology

Embedded and middleware software developers

  • Driver development and optimization using CPU trace to observe in real-time the execution of the software on the SoC.
  • OS port and debug on new platforms, OS and middleware optimization using CPU trace and software instrumentation
  • Optimization of the platform when running OS

 Application developers   

  • Optimization of applications running on OS either using trace or performance counters
  • Analysis of application impact on SoC (power, performance)

 Product engineer   

  • In the field failure analysis of final product
  • Product debug and maintenance

 Hardware engineer

  •  Debug and optimization of hardware when running software (e.g. memory system debug and analysis, interconnect analysis).

SoC architect   

  • Analysis of existing SoCs based on collected trace in final product
  • Architecture exploration and optimization using existing trace

 

Performance and Specification information for CoreSight for Cortex-A processors

Performance and Specifications for CoreSight for Cortex-A processors (PDF) Click here to download PDF




Cookies

We use cookies to give you the best experience on our website. By continuing to use our site you consent to our cookies.

Change Settings

Find out more about the cookies we set