Accelerating AMBA Protocol-Based Design
VPE-301 executes much faster than real RTL by ‘giving-up’ execution of functions within the substituted device in favor of emulating its traffic, and by replacing real data values with constrained random data.
In conclusion, for the purposes of system performance exploration, it takes significantly less development time to capture and reproduce realistic traffic profiles for different Systems IP using VPE-301 than it does to write a cycle-accurate model of the same device.
Complementing other Conventional Verification Tools
VPE-301 complements conventional verification tools in the following areas
- Directed testing
- Protocol checking
- Coverage of AMBA 3 AXI interfaces
Comprehensive Set of Features Provided
VPE-301 provides a comprehensive set of adaptable tools to stimulate and monitor AMBA 3 AXI interfaces at both block-level and system-level. VPE-301 enhances the verification process and enables you to keep control in a clear and simple way. It simplifies verification and speeds up the verification process. VPE-301 supports traditional functional verification, but also enables you to generate traffic profiles. Traffic profiles based on statistical distributions of selected AXI parameters include timing that you can either generate manually or collect from existing systems and then replay.
|Performance exploration using traffic profiling||Ease of system performance exploration using realistic traffic, speed of development of what-if scenarios, fast turnaround and high visibility without needing SystemC models, RTL or software components to be in place first|
|Channel-level directed traffic generation and checking||Ease of reuse of bus functional model directed vectors|
|Transaction recording and visualization in simulator waveform view||Makes it easier to build score-boarding and debug/decision making down to transaction level|
|Transaction recording and visualization||Visibility of system performance at an early stage of development|
|Slave memory behavior||Fully programmable slave memory device speeds up test bench generation and aids controllability|
|Protocol Checking and Coverage Monitoring||Reduces risk by checking that AXI interfaces are protocol compliant at the same time as executing a minimum set of functionality corner-cases|