CoreLink Interconnect - AMBA on-chip connectivity

CoreLink Interconnect - AMBA on-chip connectivity Image (View Larger CoreLink Interconnect - AMBA on-chip connectivity Image)
AMBA is the de-facto standard for on-chip communication.


The ARM CoreLink™ family provides on-chip AMBA® connectivity for components implementing any combination of AMBA CHI, AMBA ACE, AMBA AXI4, AMBA AXI3, AMBA AHB, AMBA AHB-Lite, AMBA APB and AMBA APB3 interfaces.

There are three families of interconnect products:

  • CoreLink CCN Cache Coherent Network - designed for enterprise applications
  • CoreLink CCI Cache Coherent Interconnect - optimised for mobile
  • CoreLink NIC Network Interconnect - highly configurable for SoC wide connectivity

CoreLink CCN-504 and CoreLink CCN-508 Cache Coherent Networks support cache coherency between processor clusters, GPUs and IO. Targetted at server and networking applications, CCN-508 supports up to 32 cores, up to 32MB of L3 cache and supports the AMBA CHI interface. CCN-504 is scalable up to 16 processor cores and also supports the AMBA 5 CHI interface.

CoreLink CCI-400 Cache Coherent Interconnect supports up to eight processor cores and is optimised for mobile applications including big.LITTLE technology, but has also seen many successful designs in multiple markets including automotive infotainment and enterprise networking. Full coherency between processors is supported with AMBA 4 ACE. The NIC-400 features QoS-400 Advanced Quality of Service option.

CoreLink NIC-400 Network Interconnect provides a fully configurable, hierarchical, low latency, low power connectivity for AMBA 4 AXI4, AMBA 3 AXI3, AHB-Lite and APB components.

All of the CoreLink products support CoreSight SoC for advanced multicore debug and trace.

ARM has one of the largest interconnect IP development teams in the industry and track record of over 100 licensees shipping many millions of units of consumer electronics.


Interconnect improves system performance and reduces power

Massive growth in system integration places on-chip communication and interconnect at the center of system performance. Traffic interactions have become complex and, if left unchecked can cause poor, unpredictable system performance.

The CoreLink family from the home of AMBA is the lowest risk solution for on-chip communication. Designed and tested with ARM Cortex and Mali processors, CoreLink interconnect from ARM provides balanced service for both low latency and high bandwidth data streams.

The CoreLink Interconnect family includes the following products for AMBA protocols:

Cache Coherency across clusters of CPU, GPU and accelerators

The CoreLink CCN-508, CCN-504 and CCI-400 interconnects provide full coherency between the L2 caches of multicore  processors including Cortex-A15, Cortex-A53, Cortex-A57, and I/O coherency with other masters such as the Mali GPU, sharing data in L2 caches of the processors. 

Hardware managed cache coherent is a fundamental technology for big.LITTLE processing, allowing the operating system to chose the right processor for the right job.

For enterprise applications CCN-508 offers scaling up to 32 processors and a large, configurable L3 cache. CCN-504 offers scaling up to 16 processors cores and integrates a shared level 3 (L3) cache. The L3 of both interconnects allows IO and accelerators to allocate cache memory on chip, offering reduced latency and power by reducing accesses to external memory.

Network features in CoreLink Network Interconnect (NIC-400, NIC-301)

The CoreLink interconnect family delivers key technologies commonly associated with network-on-chip products:

  • Ability to distribute switching and routing functions between many and complex IP blocks
  • Predictability of physical implementation
  • Communication control for system performance optimization
  • Communication visibility for software optimization
  • Reliable integration of complex system containing third party IP core

The CoreLink NIC-400 comes with options for QoS traffic regulation (QoS-400), virtual networks to prevent blocking (QVN-400) and thin links to reduce wiring (TLX-400). The NIC-400 supports long bursts in AXI4 for higher efficiency streaming media and hierarchical clock gating to dramatically reduce idle power.

Increasing performance with AMBA AXI3 and AMBA AXI4

The majority of high performance ARM designs now use AMBA standards, especially for the high performance low latency connection from processor to dynamic memory controller.

Technical features of the high-performance AMBA AXI3 and AXI4 protocols include:

  • Uni-directional channel architecture. Information flow is in one direction only, enabling very simple bridging between clock domains. This reduces the gate count and hence timing penalty when signals traverse complex SoCs
  • Support for multiple outstanding transactions. This enables parallel execution of bursts, resulting in greater data throughput. This facilitates both high performance when required, and low power as tasks complete in a shorter time
  • Independent Address and Data channels. This enables per-channel optimization, by breaking timing paths as required to maximize clock frequency and minimize latency
  • Increased flexibility. With symmetrical Master and Slave interfaces, AXI technology is easily used for anything from point-point to multi-hierarchy systems

Ease of  interconnect design speeds time to market

The CoreLink Interconnect family gives SoC architects the fastest time to market for products that deliver unparalleled internet multi-media experience.


The CoreLink family includes the following products for AMBA protocols:
  • CoreLink CCN-508 cache coherent network for up to eight CPU clusters (32 cores), supporting up to 32MB of L3 cache 
  • CoreLink CCN-504 cache coherent network for up to 16 cores, 18 ACE-Lite masters and up to 16MB L3 cache
  • CoreLink CCI-400 Cache Coherent Interconnect for up to 8 cores, AMBA 4 ACE processor clusters
  • CoreLink ADB-400 AMBA Domain Bridge for independent DVFS of processors and interconnect
  • CoreLink NIC-400 Network Interconnect for AMBA 3 or 4 systems including support for AXI4, AXI3, AHB and APB
  • CoreLink QoS-400 Advanced Quality of Service option for CoreLink NIC-400
  • CoreLink QVN-400 QoS Virtual Networks option for CoreLink NIC-400
  • CoreLink TLX-400 Thin Links option for CoreLink NIC-400
  • CoreSight SoC for advanced multicore debug and trace

The following reference will help you choose the appropriate interconnect for a given ARM processor, or Mali graphics core.

Interconnect for over 8 Cortex-A53Cortex-A57 or Cortex-A15 processors

  • For between eight and 16 cores, you should choose the CoreLink CCN-504 cache coherent network.
    • Supports Cortex-A53, Cortex-A57 and Cortex-A15 processors
  • For between sixteen and 32 cores, you should choose the CoreLink CCN-508 cache coherent network
    • Supports the Cortex-A53 and Cortex-A57 processors

Interconnect for up to 8 Cortex-A15Cortex-A7Cortex-A57Cortex-A53 processors and Mali-T600

  • You should choose CoreLink CCI-400 Cache Coherent Interconnect, ideal for low latency, low power for mobile and consumer SoCs using big.LITTLE processors.

Interconnect for Cortex-A, Mali, and ARM11 MPCore processors

Interconnect for Cortex-R processors

  • You should choose CoreLink NIC-400 Network Interconnect if your system contains many masters with different traffic requirements (latency critical, bandwidth critical, best effort) then you should also consider Advanced Quality of Service.

Interconnect for Cortex-M, Mali-55, ARM9, ARM11 processors


CoreLink is mature and widely used

The CoreLink family of products has been successfully deployed by more than 200 customers into mobile, homeautomotiveenterprise networking product markets.

More than 35 leading semiconductor vendors license the CoreLink Network Interconnect (NIC-301) and use it in more than 100 SoC tape outs.

Customer Quotes

Customer Quote


 “ARM’s ability to deliver significant IP, including high performance on-chip interconnect, together with ARM’s strong commitments to support Broadcom’s needs, are helping us decrease time to market for an increasing number of important products.” Dr. Edward Frank, Corporate VP of R&D, Broadcom.
 Toshiba   "ARM is supplying not just a processor but peripheral IP essential for SoC products, which holds great attraction in terms of speedy development of future products and getting them to the market,” said Takashi Yoshimori, Technology Executive,   SoC Design, Semiconductor Company, Toshiba Corporation. “We have been impressed with ARM’s expertise and quality in this field, as well as with the comprehensive support available.”
 Samsung  “Samsung has already achieved considerable success with products based on the ARM architecture, one of the most advanced building blocks for future digital electronics,” said Sung Bae Park, vice president, System LSI Division, Samsung Electronics. “The ARM technology [all ARM® processors and AMBA® on-chip interconnect and controller IP] will be integrated into our product portfolio for next-generation electronic products, including portable media players and mobile internet devices. We look forward to continuing our long and fruitful relationship with ARM.”

Customer Satisfaction Survey (2009) Results

  • Most customers are either 'satisfied' or 'very satisfied' with the NIC-301
  • Existing customers say that NIC-301 is easy to use and is fast to generate RTL
  • More than 95% of customers who have used NIC-301 expect to continue to use it.

What customers said they liked about NIC-301:

  • "All required features for SoC architecture were available"
  • "Highly configurable”
  • "Customizable”



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