Hard Macro Processors

The ARM Hard Macro portfolio currently consists of the Cortex-A5, Cortex-A9 and Cortex-A15 processors.

ARM Cortex-A5 Single-core 40LP Hard Macro

The smallest, lowest power ARMv7 CPU capable of reaching over 1GHz

The Cortex-A5 UP (Uni-processor) Hard Macro is the first licensable 1GHz capable Cortex-A5 processor implementation in TSMC 40LP. Today’s users are increasingly accustomed to the rich multimedia and internet experience offered by leading smart phones and tablets. The demand for these features and user experiences is driving a wide range of next generation value devices from low cost handsets and feature phones to pervasive embedded, consumer and industrial devices. The Cortex-A5 UP hard macro provides a high performance, low cost solution enriching tomorrow’s value devices with high-end graphical user interface, multimedia, internet browsing and security capabilities through the integrated FPU, NEON™ and TrustZone® features.   

---

ARM Cortex-A9 Dual-core 40G Hard Macros

2GHz Capable Cortex-A9 Dual-Core Processor Implementation

The Cortex-A9 dual-core hard macro implementations on TSMC 40G process enable silicon manufacturers to have a rapid and low risk route to silicon for high-performance, low-power Cortex-A9 processor-based devices for the consumer and enterprise market. The hard macro is available as two variants – speed optimized and power optimized. The Cortex-A9 speed-optimized hard macro incorporates aggressive low-power techniques to extend further ARM performance leadership into high-margin consumer and enterprise devices within the power envelope necessary for compact, high density and thermally constrained environments. This implementation operates in excess of 2GHz when selected from typical silicon and represents an ideal solution for high-margin performance-oriented applications. Power Optimized In applications where energy efficiency is of paramount importance, the Cortex-A9 power-optimized hard macro implementation offers an attractive mix of performance and low power, capable of operation at 800MHz under a tight power budget.    

---

ARM Cortex-A15 Quad-core 28HPM Hard Macro

 2GHz+ Capable Cortex-A15 Quad-Core Processor Implementation

The ARM Cortex-A15 quad-core hard macro is capable of delivering more than 2.0GHz on a TSMC 28HPM process. The low leakage implementation, featuring integrated NEON SIMD technology and floating point (VFP), delivers an extremely competitive balance of performance and power and is ideal for wide array of high-performance computing applications for such as notebooks through to power-efficient, extreme performance-orientated network and enterprise devices.

ARM Hard Macros are available in a number of different implementation options with more being added.

Currently the following options are available.                      

	Process
Processor	TSMC 40LP	TSMC 40G	TSMC  28HPM
Cortex-A5 Single-core	X
Cortex-A9 Dual-core		X
Cortex-A15 Quad-core			X

ARM Hard macro processors incorporate and are supported by a broad range of ARM technology including  Physical IP and development tools. This technology is complemented by a broad range of SoC and software design solutions, tools and services from the ARM Connected Community™ to provide ARM Partners with a smooth path through the development, verification and production of full function, compelling devices while significantly reducing time-to-market.

---

Physical IP

ARM Hard Macros are based upon a set of high performance POP™ IP containing advanced ARM Physical IP for 40nm and 28nm technologies to enable rapid development of leadership physical implementations. ARM is also working early to assure a roadmap to 20nm optimizations.

POP IP supports ARM strategy of offering specifically targeted Physical IP to enable Partners to achieve tuned implementations of ARM cores. ARM is uniquely able to design the optimization packs in parallel with the Cortex processor architecture, enabling the processor and physical IP combination to deliver workstation class performance in a mobile power envelope while facilitating rapid time-to-market.

POP IP is composed of three elements necessary to achieve an optimized ARM core implementation.

• First, it contains ARM Artisan® Physical IP logic libraries and memory instances that are specifically tuned for a given ARM core and process technology. This Physical IP is developed through a tightly coupled collaboration with ARM Processor Division engineers in an iterative process to identify the optimal results.
• Second, it includes a comprehensive benchmarking report to document the exact conditions and results ARM achieved for the core implementation.
• Finally, it includes a POP Implementation Guide that details the methodology used to achieve the result, to enable the end customer to achieve the same implementation quickly and at low risk.

 

---

 

Tools Support

All ARM processors are fully supported in the ARM Development Suite 5 (DS-5™) tool suite, as well as a wide range of third party tools, operating systems and EDA flows. 

ARM DS-5 software development tools are unique in their ability to provide solutions that take full advantage of the complete ARM technology portfolio. The ARM Development Studio 5 (DS-5™) provides a complete range of software tools to create, debug and optimize systems based on the Cortex-A15 MPCore processor. It incorporates the DS-5 Debugger, whose powerful and intuitive graphical environment enables fast debugging of bare metal, Linux and Android native applications. In addition, its new ARM Streamline™ Performance Analyzer simplifies the identification of hot spots in software and load balancing between cores. Early software development before silicon availability is enabled by the ARM Compiler, and an ARM Versatile™ Reference Virtual Platform built on ARM Fast Models technology. This Virtual Platform is available for a free 6-month evaluation.