CMSIS - Cortex Microcontroller Software Interface Standard

CMSIS defines for a Cortex-M series processor-based system standard software interfaces that provide the following functionality:  

• The CMSIS-CORE defines an API for a complete system and supports all Cortex-M series processors (Cortex-M0, Cortex-M3, Cortex-M4, SC000, andSC300). It provides a system start-up method and functions to access specific processor features and core peripherals. It includes helper functions for print-style output via the CoreSight™ debug unit and defines a debug channel for RTOS kernel-awareness.Each peripheral has a consistent structure that defines the peripheral registers and all interrupts of a device consistently across CMSIS compliant devices.  

• The CMSIS-DSP library includes vector operations, matrix computing, complex arithmetic, filter functions, control functions, PID controller, Fourier transforms and many other frequently used DSP algorithms.  Most algorithms are available in floating-point and various fixed-point formats and are optimized for the Cortex-M series processors.  The Cortex-M4 processor implementation uses the ARM DSP SIMD (Single Instruction Multiple Data) instruction set and floating-point hardware to enable fully the capabilities of the Cortex-M4 processor for signal processing algorithms. The CMSIS-DSP library, written entirely in C and delivered with source code, enables software programmers to adapt algorithms for specific application requirements.  

• The CMSIS-RTOS API standardizes the interface to real-time operating systems and extends the benefits of the CMSIS for software components that require RTOS functionality. The unified feature set of the CMSIS-RTOS API simplifies sharing of software components that require a real-time operating system. Middleware, libraries, and other software components that use the CMSIS-RTOS API are RTOS agnostic and are easier to combine and to adapt.  

• The CMSIS-SVD System View Description XML specification describes the programmer's view of the microcontroller system including the peripheral registers. SVD files can create the CMSIS-CORE header files that include peripheral register and interrupt definitions. Another use-case is to create peripheral awareness dialogs for debuggers. SVD files for many devices are available for downloaded under the CMSIS-SVD tab.  

CMSIS-RTOS implementations are currently available from:  

• Keil/ARM provides the RTX Kernel with a CMSIS-RTOS interface under a open-source BSD license. The kernel is adapted for ARMCC, GCC, and IAR compilers.
• mbed includes the CMSIS-RTOS functionality and even provides a C++ encapsulation of several RTOS functions.    

It is expected that more RTOS vendors will provide CMSIS-RTOS implementations within the next few months.  

The SVD file typically matches the information provided by silicon vendors in device reference manuals.

Silicon Vendors:

Tools Vendors