
The CMSIS consists of the following components:
- Peripheral Register and Interrupt Definitions: a consistent interface for device registers and interrupts
- Core Peripheral Functions: access functions for specific processor features and core peripherals
- DSP Library: optimized signal processing algorithms and for Cortex-M4 support of SIMD instructions
- System View Description (SVD): XML file that describes the device peripherals and interrupts.
The standard is fully scalable to ensure that it is suitable for all Cortex-M processor series microcontrollers from the smallest 8 KB device up to devices with sophisticated communication peripherals such as Ethernet or USB. (The memory requirement for the Core Peripheral Functions is less than 1 KB code, less than 10 Bytes RAM).















