Delivering higher performance and richer features

Introduced in 2004 and recently updated with new technologies and configurability, the Cortex-M3 is the mainstream ARM processor developed specifically with microcontroller applications in mind.

Performance and energy efficiency

With high performance and low dynamic power consumption the Cortex-M3 processor delivers leading power efficiency. Coupled with integrated sleep modes and optional state retention capabilities the Cortex-M3 processor ensures there is no compromise for applications requiring low power and excellent performance.

Full featured

The processor executes Thumb^®-2 instruction set for optimal performance and code size, including hardware division, single cycle multiply, and bit-field manipulation. The Cortex-M3 NVIC is highly configurable at design time to deliver up to 240 system interrupts with individual priorities, dynamic reprioritization and integrated system clock.

Rich connectivity

The combination of features and performance enables Cortex-M3 based devices efficiently to handle multiple I/O channels and protocol standards such as USB OTG (On-The-Go).

ARM Cortex-M3 Specifications

ARM Cortex-M3 Features
ISA Support	Thumb® / Thumb-2
Pipeline	3-stage
Performance Efficiency	3.34 CoreMark/MHz*
Performance Efficiency	1.25 / 1.50 / 1.89 DMIPS/MHz**
Memory Protection	Optional 8 region MPU with sub regions and background region
Interrupts	Non-maskable Interrupt (NMI) + 1 to 240 physical interrupts
Interrupt Priority Levels	8 to 256 priority levels
Wake-up Interrupt Controller	Up to 240 Wake-up Interrupts
Sleep Modes	Integrated WFI and WFE Instructions and Sleep On Exit capability. Sleep & Deep Sleep Signals. Optional Retention Mode with ARM Power Management Kit
Bit Manipulation	Integrated Instructions & Bit Banding
Enhanced Instructions	Hardware Divide (2-12 Cycles), Single-Cycle (32x32) Multiply, Saturated Math Support.
Debug	Optional JTAG & Serial-Wire Debug Ports. Up to 8 Breakpoints and 4 Watchpoints.
Trace	Optional Instruction Trace (ETM), Data Trace (DWT), and Instrumentation Trace (ITM)

* see: http://www.eembc.org/benchmark/reports/benchreport.php?benchmark_seq=1687&suite=CORE

** The first result abides by all of the “ground rules” laid out in the Dhrystone documentation, the second permits inlining of functions, not just the permitted C string libraries, while the third additionally permits simultaneous (”multi-file”) compilation. All are with the original (K&R) v2.1 of Dhrystone

ARM Cortex-M3 Implementation Data***
	90LP (7-track, typical 1.2v, 25°C)	40LP (9-track, typical 1.1v, 25°C)	28HPM (9-track, typical 0.9v, 85°C)
Dynamic Power	31 µW/MHz	11 µW/MHz	8 µW/MHz
Floorplanned Area	0.09 mm2	0.02 mm2	0.01 mm2

*** Base usable configuration includes 1 IRQ + NMI, excludes ETM, MPU and debug

ARM Cortex-M Technologies

The Cortex-M processors are based on a range of ARM technologies that make them extremely popular and successful.

ARMv6-M and ARMv7-M Architectures	Thumb-2® technology (Instruction Set Architecture)
Designed for efficient embedded system. Very easy to use, most applications can be programmed completely in C or any high level language Scalable architecture supporting ultra-low power sensors to high performance controllers	Powerful instruction set to enable high performance systems High code density Bit field processing instructions for I/O control and communication applications SIMD instructions in ARMv7-M architecture for DSP applications IEEE-754 Floating point support in Cortex-M4 and Cortex-M7 Processors

Micro-architecture designs to fit your applications

Nested Vectored Interrupt Controller (NVIC)

2 stage pipeline in Cortex-M0+ Processor for state of the art energy efficiency 3 stage pipeline in Cortex-M0 for a very compact 32-bit embedded processor 3 stage enhanced pipeline in Cortex-M3 and Cortex-M4 processors for high performance embedded system while providing low power advantages 6 stage superscalar pipeline in Cortex-M7 processor for unmatched performance for embedded processors Innovative features such as single cycle I/O interface in the Cortex-M0+ processor, to high bandwidth memory system in the Cortex-M7 processor

Integrated interrupt controller Flexible and powerful interrupt management Easy to set-up and use Very low interrupt latency without hidden software overhead Interrupt Handlers can be written entirely in C Deterministic and low jitter Various optimizations to lower Interrupt overhead

Advanced low-power optimization	AMBA (Advanced Microcontroller Bus Architecture)
Architectural defined sleep modes Multiple power and clock domains Low power optimizations in processor designs Support for advanced low power technologies (e.g. State Retention Power Gating) Instructions to support sleep modes	Open on-chip bus standards enable chip designers to integrate systems easily. Scalable from simple system to complex multi-processor systems Cortex-M System Design Kit provides infrastructure components and example systems Many 3rd party peripheral IP available

CoreSight Debug and Trace

Cortex-M Software Interface Standard

Powerful debug and trace features using small number of connection pins Support for debug in multiple processors Same tools for wide range of ARM Processor families Multiple choices of debug communication protocols (JTAG and Serial Wire Debug) Wide choice of debug tools available

CMSIS-Core : A software framework to enable better software reusability and portability, and make Cortex-M Programming easier and vendor independent. CMSIS-DSP : Free DSP library for all Cortex-M Processors CMSIS-RTOS : RTOS API standard to enable middleware to be portable between multiple RTOS CMSIS-DAP: Reference design for debug adaptor to enable low cost development platforms CMSIS-SVD : XML based System View Description file standard to enable easier debugger support for new chips CMSIS-PACK : Software packaging standard for easier software component distributions. CMSIS-Driver: Vendor independent hardware abstraction layer APIs to enable middleware to be portable across wide range of MCU devices.

Tools support
ARM Compiler, Keil MDK and free open-source ARM gcc Broad range of 3rd party development tools, debug tools, middleware and embedded OS Development boards from ARM and Keil Easy software reuse mbed OS for IoT applications

ARM Cortex-M Code Size Advantage Explained

ARM Cortex-M processors offer superior code density compared to 8-bit and 16-bit architectures. This has significant advantages in terms of reduced memory requirements and maximizing the usage of precious on-chip Flash memory. In this section we examine the reasons for this advantage.

Instruction width

It is a common misconception that 8-bit microcontrollers use 8-bit instructions and ARM Cortex-M processor-based microcontrollers use 32-bit instructions. In reality for example, the PIC18 and PIC16 instruction sizes are 16-bit and 14-bit respectively. For the 8051 architecture, although some instructions are 1 byte long, many others are 2 or 3 bytes long. The same also applies to 16-bit architectures, where some instructions can take 6 or more bytes of memory.

The ARM Cortex-M processors utilize the ARM Thumb^®-2 technology which provides excellent code density. With Thumb-2 technology, the Cortex-M processors support a fundamental base of 16-bit Thumb instructions, extended to include more powerful 32-bit instructions. In many cases a C compiler will use the 16-bit version of the instruction unless the operation can be carried out more efficiently using a 32-bit version.

Instruction efficiency

This picture is not complete without also considering that ARM Cortex-M processor instructions are more powerful. There are many circumstances where a single Thumb instruction equates to several 8/16-bit microcontroller instructions; this means that Cortex-M devices have smaller code and achieve the same task at lower bus speed.

Comparing 16-bit Multiply Operations Across Processor Architectures

8-bit example		16-bit example	ARM Cortex-M
MOV A, XL ; 2 bytes MOV B, YL ; 3 bytes MUL AB; 1 byte MOV R0, A; 1 byte MOV R1, B; 3 bytes MOV A, XL ; 2 bytes MOV B, YH ; 3 bytes MUL AB; 1 byte ADD A, R1; 1 byte MOV R1, A; 1 byte MOV A, B ; 2 bytes ADDC A, #0 ; 2 bytes MOV R2, A; 1 byte MOV A, XH ; 2 bytes MOV B, YL ; 3 bytes	MUL AB; 1 byte ADD A, R1; 1 byte MOV R1, A; 1 byte MOV A, B ; 2 bytes ADDC A, R2 ; 1 bytes MOV R2, A; 1 byte MOV A, XH ; 2 bytes MOV B, YH ; 3 bytes MUL AB; 1 byte ADD A, R2; 1 byte MOV R2, A; 1 byte MOV A, B ; 2 bytes ADDC A, #0 ; 2 bytes MOV R3, A; 1 byte	MOV R4,&0130h MOV R5,&0138h MOV SumLo,R6 MOV SumHi,R7 (Operands are moved to and from a memory mapped hardware multiply unit)	MULS r0,r1,r0

N.B. The Cortex-M multiply in fact performs a 32-bit multiply; here we assume r0 and r1 contain 16-bit data.

Compact Data Footprint

It is important to note that Cortex-M processors have support for 8-bit and 16-bit data transfers, making efficient use of data memory. This means programmers can continue to use the same data-types as they have in 8/16-bit targeted software.

Energy Efficiency Advantage

The demand for ever lower-cost products with increasing connectivity (e.g. USB, Bluetooth, IEEE 802.15) and sophisticated analog sensors (e.g. accelerometers, touch screens) has resulted in the need to integrate analog devices more tightly with digital functionality to pre-process and communicate data. Most 8-bit devices do not offer the performance to sustain these tasks without significant increases in clock frequency and therefore power, meaning embedded developers are required to look for alternative devices with more advanced processor technology. The 16-bit devices have previously been used to address energy efficiency concerns in microcontroller applications. However, the relative performance inefficiencies of 16-bit devices mean they will generally require a longer active duty cycle or higher clock frequency to accomplish the same task as a 32-bit device.

Ease of Software Development

Software development for ARM Cortex processor-based microcontrollers can be much easier than for 8-bit microcontroller products. Not only is the Cortex processor fully C programmable, it also comes with various enhanced debug features to help locating problems in software. There are also plenty of examples and tutorials on the internet, including many from ARM processor-based MCU vendor's websites, alongside any additional resources included in MCU development kits.

ARM Cortex-M processors benefit from the widest third-party tools, RTOS, middleware support of any architecture. In this section you will find useful documentation, white papers and tutorials on ARM Cortex-M processors and related technologies. For further information including information on development tools, software, boards, CMSIS and mBed, visit the ARM Embedded Microsite.

ARM^® Connected Community

• A Tour of the Cortex-M3 Core
• Other Cortex-M3 related blogs, discussions, technical content

Books

Definitive Guide to the ARM Cortex-M0 A comprehensive guide to programming and implementing the groundbreaking ARM Cortex-M0 processor

Definitive Guide to the ARM Cortex-M3 A comprehensive guide to programming and implementing the groundbreaking ARM Cortex-M3 processor

Documentation for Cortex-M device users

• Cortex-M1 FPGA Development Kit Tutorial
• Migrating from ARM7 to Cortex-M3 (256 KB )

Software development tools for Cortex-M device users

• Keil
• mbed
• Third party tools and RTOS support

Find Cortex-M based microcontrollers

• Keil microcontroller device database
• ARM MCU Community - www.onarm.com
• Find an ARM Partner

Universities

• ARM University Program

Related User Guides and App Notes

Cortex-M0/3/4 Devices Generic User Guides

• Software Development
  • Cortex-M0 Devices Generic User Guide
  • Cortex-M3 Devices Generic User Guide
  • Cortex-M4 Devices Generic User Guide

Instruction Timing Information

• Cortex-M0 Technical Reference Manual (TRM)
• Cortex-M3 Technical Reference Manual (TRM)
• Cortex-M4 Technical Reference Manual (TRM)

Architecture (requires registration)

• ARMv7-M Architecture Reference Manual
• ARMv6-M Architecture Reference Manual

ARM Application Notes

• AN237 - Migrating from 8051 to Cortex Microcontrollers
• AN234 - Migrating from PIC Microcontrollers to Cortex-M3
• AN179 - Cortex™-M3 Embedded Software Development

Keil Application Notes

• 193: Migrating to MDK-ARM from RVDS
• 197: Serial-Wire Debug and Realtime Trace on STM32 Devices
• 202: MDK-ARM Compiler Optimizations
• 208: Keil uVision and Actel SmartFusion
• 209: Using Cortex-M3 and Cortex-M4 Fault Exceptions
• 220: Memory Configuration on Freescale Kinetis devices
• 221: Using CMSIS-DSP Algorithms with RTX

DesignStart for Processor IP

• Cortex-M3 DesignStart Processor
• Cortex-M0 DesignStart Processor