The CMSDK is optimized for low gate count, energy efficient implementations. The peripherals are optimized for area, with the interconnects optimized for low latency, reducing wasted clock cycles and improving performance. This includes both a zero-latency AHB master multiplexor and an optimized bus matrix that enables near-ideal bus performance even when the processor is in a multi-master system with full access to all peripherals. The CMSDK also supports the low-power sleep modes of the Cortex-M processors and separates the peripheral bus clock and peripheral clocks enabling even lower power designs.
In summary with CMSDK and a Cortex-M processor you can integrate a processing subsystem in to your product quickly, effectively and with minimum risk.