The ARMv8 architecture allows clean interworking between 32-bit and 64-bit in AArch64 state, enabling a step-by step migration to 64-bit, beginning with 64-bit operating systems running 32-bit ARMv7 applications, migrating to a mix of 32-bit applications and 64-bit applications running in the same system.
With the ARMv8 architecture, the Cortex-A50 series processors also introduce more advanced SIMD capability, instructions to speed up software cryptography, increased register files, flexible addressing modes, support for tagged pointers, 64k data pages, a new exception model, enhanced cache management and enhanced floating point operations (IEEE754-2008).
Other features include load-acquire and store-release, which are an excellent match for the C++11, C11 and Java memory models, improving performance of thread-safe code by removing the need for explicit memory barrier instructions in many cases. Automatic event signaling enables power-efficient, high-performance spinlocks.
The Cortex-A53 and Cortex-A57 processors also introduce new power saving features such as retention modes and more extensive hierarchical clock gating to automatically save power when all or a portion of the processor is idle. While adding these new capabilities, the Cortex-A50 series processors are fully compatible with 32-bit ARMv7 software.