ARM9 Processor Family

ARM9 Processor Family Image
The ARM9™ processor family enables single processor solutions for microcontroller, DSP and Java applications, offering savings in chip area and complexity, power consumption, and time-to-market.

The ARM9 DSP-enhanced processors are well suited for applications requiring a mix of DSP and microcontroller performance.

The ARM9 processor family includes ARM926EJ-S™ARM946E-S™ and ARM968E-S™ processors.


Industry standard

Over 5 Billion ARM9 processors have been shipped so far

  • The ARM9 family is the most popular ARM processor family ever
    • 250+ silicon licensees
    • 100+ licensees of the ARM926EJ-S processor
  • ARM9 processors continue to be successfully deployed across a wide range of products and applications.
  • The ARM9 family offers proven, low risk and easy to use designs which reduce costs and enable rapid time to market.
  • The ARM9 family consists of three processors - ARM926EJ-S, ARM946E-S and ARM968E-S.

Broadcom Samsung Texas Instruments Toshiba

The full list of ARM9 licensees is available here.

Range of applications

ARM9 processors are at the heart of advanced digital products across multiple applications

ARM9 family processors deliver deterministic high performance and flexibility for demanding and cost-sensitive embedded applications. The rich DSP extensions available remove the need for a separate DSP in the SoC design. In addition, the PPA is ideally suited to a wide range of applications.

Product Type Application
Consumer Smartphones, PDA, Set top box, PMP, Electronic toys, Digital still cameras, Digital video cameras etc
Networking Wireless LAN, 802.11, Bluetooth, Firewire, SCSI, 2.5G/3G Baseband etc
Automotive Power train, ABS, Body systems, Navigation, Infotainment etc
Embedded USB controllers,bluetooth controllers, medical scanners etc
Storage HDD controllers, solid state drives etc

Cost Effective

From a single design to perpetual ownership

  • Processors are available to licese in a number of forms
  • Available as per-use, multi-year term, and perpetual use licenses
  • Also available as hard-macros to reduce time-to-market and design risks

Cortex ProcessorsRobust roadmap

Planning for the future

  • The ARM9 family has a robust roadmap linking to the latest Cortex processors
  • The Cortex-A and Cortex-R families provide powerful, feature-rich options for easy migration of ARM9 designs to the next generation

ARM Connected CommunityEcosystem

Over 650 members in the Connected Community supporting ARM9 processors

  • Broadest ecosystem of compilers, debuggers and RTOS tools in the industry
  • Plentiful design services partners to aid in design task
  • Large variety of third party IP available to integrate with processors.

The ARM9 family includes the ARM968E-S, the ARM946E-S and the ARM26EJ-S processors.


Smallest footprint ARM9 processor with DSP enhancements, for low power, data intensive, embedded real-time applications

The smallest and lowest power ARM9 processor is ideal for many real time type applications. The processor operates efficiently from the Tightly Coupled Memory that can easily be integrated through standard interfaces.


DSP enhanced cached processor with an MPU for real-time applications running an RTOS

A real time orientated processor with optional caches interfaces plus a full Memory Protection Unit. This processor is useful in applications where the majority of code exists in main memory, and is loaded into cache on demand, while key exception handing code and data can be maintained locally in Tightly Coupled Memory.


Application processor with Java acceleration, DSP extensions and an MMU, for OS based applications

The ARM926EJ-S is the entrypoint processor capable of supporting full Operating System including Linux, WindowsCE, and Symbian. As such this processor is ideal for many applications requiring a full Graphical User Interface.

ARM9 family processor naming - ARM9xxE(J)-S

  • E - DSP extensions
    • Enhanced instructions for efficient fractional saturating arithmetic
    • Single cycle 32x16 multiplier implementation
    • 32x16 and 16x16 multiply instructions
    • Count leading zeros instruction
  • J - Java acceleration through Jazelle
    • Embedded Jazelle hardware acceleration Java performance of ~1300CM @ 220MHz
    • Reduced complexity & power consumption over a typical Java hardware coprocessor solution
    • Available on the ARM926EJ-S processor only
  • S - Fully synthesizable

ARM9 family processor comparison of key features

ARM9 Family Comparison

For more details on the comparative features of ARM9 family processors, you can also use the Processor Selector.

Migrating to Cortex

The ARM9 family has a robust roadmap linking to the latest ARM Cortex processors. The Cortex-A and Cortex-R families provide powerful, feature-rich options for easy migration of ARM9 designs to the next generation.

ARM9 Family Processor ARM Cortex Family Alternative Processor Comparison
ARM968E-S Cortex-R4 Compare ARM968E-S with Cortex-R4
ARM946E-S Cortex-R4 Compare ARM926EJ-S with Cortex-R4
ARM926EJ-S Cortex-A5 Compare ARM926EJ-S with Cortex-A5 using the Processor Selector

ARM9 Family Technical Features

  • Based on ARMv5TE architecture
  • Efficient 5-stage pipeline for faster throughput and system performance
    • Fetch/Decode/Execute/Memory/Writeback 
  • Supports both ARM and Thumb® instruction sets 
    • Efficient ARM-Thumb interworking allows optimal mix of performance and code density 
  • Harvard architecture - Separate Instruction & Data memory interfaces 
    • Increased available memory bandwidth 
    • Simultaneous access to I & D memory 
    • Improved performance 
  • 31 x 32-bit registers 
  • 32-bit ALU & barrel shifter 
  • Enhanced 32-bit MAC block 

CoreSight™ ETM9 interface for enhanced debugging and trace 

Memory Controller

  • Memory operations are controlled by the MMU or MPU 
  • MMU provides 
    • Virtual memory support
    • Fast Context Switching Extensions (FCSE) 
  • MPU enables 
    • Memory protection and bounding 
    • sand-boxing of applications 
  • Write buffers 
    • Decouple the internal processor from external memory
    • Can store 16 words at 4 independent addresses
    • Cast out write buffer for dirty line evictions

Flexible Cache Design

  • Harvard cache architecture 
  • Sizes can be 4 KB to 128 KB increasing in powers of 2 
  • I & D Caches can have independent sizes 
  • Line length fixed at 8 words 
  • Fixed 4 way set association 
  • Zero wait state accesses 
  • Critical word first cache line fill 
  • Non blocking 
  • Virtually addressed

Flexible TCM design

  • Harvard organization
  • Sizes can be 0 KB, or 4 KB to 1 MB increasing in powers of two
  • Can have independent sizes
  • Can be RAM or ROM
  • Wait states permitted 
  • Dual banked TCM on ARM968 
  • Physically addressed 
    • 1 cycle of penalty for non-sequential accesses to allow address translation

DSP Enhancements 

  • Single cycle 32x16 multiplier implementation 
    • Speeds up all multiply instructions 
    • Pipelined design allows one 16x16 or 32x16 to start each cycle 
  • New 32x16 and 16x16 multiply instructions 
    • Allow independent access to 16-bit halves of registers 
    • Gives efficient use of 32-bit bandwidth for packed 16-bit operands 
    • ARM ISA provides 32x32 multiply instructions 
  • Efficient fractional saturating arithmetic 
  • Count leading zeros instruction 
    • CLZ for faster normalisation and division

Go Left
Go Right



We use cookies to give you the best experience on our website. By continuing to use our site you consent to our cookies.

Change Settings

Find out more about the cookies we set