ARM968 Processor

ARM SC12

ARM SC9

ARM SC12

ARM SC7

297

198 

517

308

1.1

1.1

1.1

1.1

270

180

470

280

-

-

-

-

0.45

0.40

0.42

0.20

Power (mW/MHz)

0.14

0.11

0.11

0.06

7.86

10.0

10.0 

18.3

• ARM
• Thumb^®
• DSP
• Floating Point Unit (optional)

 2x AMBA^® AHB^™ Interfaces

• AHB-lite Master for regular use
• AHB-lite slave for DMA TCM access

The ARM 32-bit instruction set is used in applications requiring high performance. ARM instructions are 32-bits wide, and are aligned on 4-byte boundaries. All ARM instructions can also be "conditionalised" to only execute when previous instructions have set a particular condition code.

Thumb is an extension to the 32-bit ARM architecture. The Thumb instruction set features a subset of the most commonly used 32-bit ARM instructions which have been compressed into 16-bit wide opcodes. On execution, these 16-bit instructions are decompressed transparently to full 32-bit ARM instructions in real time without performance loss.

Designers can use both 16-bit Thumb and 32-bit ARM instructions sets and therefore have the flexibility to emphasize performance or code size on a sub-routine level as their applications require.

The ARM968E-S processor supports highly configurable instruction and data TCMs. TCMs are typically used for applications that may not respond well to caching, such as highly deterministic or low-latency applications with finite closed-loop control. TCM accesses are deterministic and do not access the AHB. Therefore, you can use the DTCM and ITCM to store real-time, performance-critical code.

The Instruction TCM typically handles interrupts or exceptions, and the Data TCM handles data intensive tasks, such as audio or video processing. The second interface can have two memory ports to increase bandwidth and enable interleaving against incoming DMA-based data streams 

The features of the TCM interface include: 

• Independent ITCM and DTCM sizes of 0KB or 1KB-4MB in power-of-two increments 
• Alternately accessed DTCM ports, D0TCM and D1TCM, for simultaneous, interleaved DMA and processor access to DTCM at 32-bit (word) granularity
• Software visibility and programmability of TCM size and enable
• Boot control for ITCM
• Data access to the ITCM for literal pool generation in code
• Simple SRAM-style interface supporting both reads and writes
• Variable TCM wait state control for ITCM and DTCM
• Separate AHB-Lite slave interface for DMA engine

The TCM is located in the TCM address space of the memory map.

The ARM9 family benefits from powerful DSP extensions that enable low-power, high-performance ARM9 based solutions for a broad range of software applications such as servo motor control, Voice over IP and video & audio codecs. 

The ARM DSP extensions enable increased DSP performance without the need for very high clock frequencies. This performance is achieved with almost no increase in power consumption on a typical implementation. In many applications including smartphones and similar embedded systems requiring considerable signal processing, the DSP extensions can often eliminate the need for additional hardware accelerators.

• Single-cycle 16x16 and 32x16 MAC implementations
• 2-3 x DSP performance improvement over ARM7™-based CPU products
• Zero overhead saturation extension support
• Instructions to load and store pairs of registers, with enhanced addressing modes
• CLZ instruction improves normalization in arithmetic operations and improves divide performance

Compilers targeting the ARM architecture can use these DSP extensions to improve code-generation for standard C and C++ software, or allow software developers to explicitly request use of these extension via intrinsics or inline assembly code.

The VFP9-S coprocessor provides IEEE 754 standard-compatible operations. Designed specifically for the ARM9 processor family, the VFP9-S coprocessor provides full support of single-precision and double-precision add, subtract, multiply, divide, and multiply with accumulate operations. Conversions between floating-point data formats and ARM integer word format are provided, with special operations to perform the conversion in round-toward-zero mode for high-level language support.

The VFP9-S coprocessor provides a performance-power-area solution for embedded applications and high performance for general-purpose applications, such as Java.

The VFP9-S coprocessor is optimized for: 

• High data transfer bandwidth through 32-bit split load and store buses 
• Fast hardware execution of a high percentage of operations on normalized data resulting in higher overall performance while providing full IEEE 754 standard support when required 
• Divide and square root operations in parallel with other arithmetic operations to reduce the impact of long-latency operations
• Near IEEE 754 standard compatibility in RunFast mode without support code assistance, providing determinable run-time calculations for all input data
• Low power consumption, small die size, and reduced kernel code

The ARM968E-S processor contains hardware extensions for advanced debugging features to facilitate application software and operating system development.  

The debug extensions enable halted system debug to examine the internal state of the processor and the external state of the AHB while all other system activity continues as normal.  

Monitor debug-mode operation is also supported which enables users to debug the ARM968E-S processor while critical interrupt service routines are executing.

The debug monitor program typically communicates with the debug host over the debug communications channel.

System IP components are essential for building complex system on chips and by utilizing ARM System IP components developers can significantly reduce development and validation cycles, saving cost and reducing time to market

Description

AMBA Bus

System IP Components

Enable fast configuration of embedded systems with an AMBA AHB interface

AHB

AMBA Design Kit (ADK)

AHB Memory Controllers (Dynamic, static and hybrid memory controllers)

AHB

PL24X family

Synthesisable UART

AHB

PL011

Synthesisable Single-wire Peripheral Interface (SPI) controller

AHB

PL022

Synthesisable keyboard or mouse interface complying with IBM-defined PS/2 interface standard

AHB

PL050

Synthesisable GPIO controller supporting 8 bits with interrupt control.

AHB

PL061

The Mali™ family of products combine to provide the complete graphics stack for all embedded graphics needs, enabling device manufacturers and content developers to deliver the highest quality, cutting edge graphics solutions across the broadest range of consumer devices.

Mali-55 GPU

The Mali-55 GPU is the world’s smallest OpenGL ES 1.1 compliant GPU using the Mali tile-based rendering architecture to maximize the efficiency of energy usage in displaying graphical images and to minimize the bandwidth demands on the system.

ARM^® Physical IP Platforms deliver process optimized IP, for best-in-class implementations of ARM processors.

Standard Cell Logic Libraries

Available in a variety of different architectures ARM Standard Cell Libraries support a wide performance range for all types of SoC designs. Designers can choose between different libraries and optimize their designs for speed, power and/or area

Memory Compilers and Registers

A broad array of silicon proven SRAM, Register File and ROM memory compilers for all types of SoC designs ranging from performance critical to cost sensitive and low power applications.

Interface Libraires

A broad portfolio of silicon-proven Interface IP designed to meet varying system architectures and standards. General Purpose I/O, Specialty I/O, High Speed DDR and Serial Interfaces are optimized to deliver high data throughput performance with low pin counts.