Physical IP Design Enablement

ARM Physical IP products are designed to enable superior results with leading Electronic Design Automation (EDA) design tools and flows. Each product is delivered with an extensive and accurate set of models, supporting industry-leading formats, validated with tools from Cadence, Magma, Mentor Graphics and Synopsys.

Physical IP EDA Deliverables Highlights

Simulation models
Timing models (non-linear and current source)
Advanced power modeling (including CPF and UPF support)
Signal integrity and IR drop analysis models
DFT models
Place-and-route abstracts
LVS netlists
GDSII files

ARM works closely with leading EDA partners for integration and optimization of ARM IP deliverables with the most advanced design flows. ARM works with each partner in the development and validation of various design flows and methodologies, enabling successful path from RTL to foundry-ready GDSII.

Collaboration examples

ARM processor-based Implementation Reference Methodologies (iRMs) enable ARM licensees to customize, implement, verify and characterize soft ARM processors. These iRMs for Cadence, Magma and Synopsys design flows enable a predictable route to silicon, and a basis for custom methodology development.
Common Platform Reference Flows are comprehensive and flexible solutions validated with ARM physical IP to ensure quality-of-results and ease-of-use. These flows highlight integrated solutions for timing, power, area, and signal integrity. For more information, please visit Common Platform.

The goal of the ARM Physical IP EDANet Program is to ensure top-quality and extensive support for the IC design tools and flows used by our mutual customers using ARM Physical IP.

The "Low Power Methodology Manual" (LPMM) is a comprehensive and practical guide to managing power in system-on-chip designs, critical to designers using 90-nanometer and below technology. Find out more by applying to download the LPMM book.

Video: Design for Power Gating - And What UPF Can, and Cannot, Do for You - Dave Flynn, ARM Fellow

Power gating is a valuable technique for reducing standby power in portable applications and supports power-rail switching of subsystems to cut leakage power.

Originally recorded on March 17, 2009 at SNUG San Jose in Santa Clara, CA. Register to download this very useful video.