Soft Macrocell Models are currently available for the following processors: Soft Macrocell Model | Cache | Tightly Coupled Memory (TCM) | Vector Floating Point | NEON
Technology | ETM
(*) | SMM926EJ-S | 4-32KB selectable | 1MB or external | No | No | Yes | SMM946E-S | 4-32KB selectable | 1MB or external | No | No | Yes | SMM966E-S | No cache | 1MB or external | No | No | Yes | SMM968E-S | No cache | 2MB I, 128KB D or external | No | No | Yes | SMM1026EJ-S | 4-32KB selectable | 1MB or external | No | No | Yes | | SMM1136J-S | 8-64KB selectable | 64KB internal | No | No | No | | SMM1136JF-S | 8-64KB selectable | 64KB internal | Yes | No | No | | SMM1156T2F-S | 16KB fixed | 256KB I, 32KB D internal | Yes | No | No | SMM1176JZF-S | 16KB fixed | 16KB internal | Yes | No | No | | SMM-A8 | 32K L1
256K L2 | No | Yes
VFP lite | Yes | Yes | SMM-R4F | 64KB | 256KB I, 32KB D | Yes | No | Yes |
(*) ETM: Embedded Trace Macrocell. Some SMMs have an integrated ETM, while others only make available the processor's ETM interface. The SMM1136JF-S, SMM1156T2F-S and SMM1176JZF-S are implemented in an LT-XC2V8000 Logic Tile. The other ARM9, ARM10 SMMs and ARM1136J-S SMM are implemented in an LT-XC2V6000.
SMM-R4F is implemented in a LT-XC4VLX200. SMM-A8 is implemented in a LT-XC5VLX330.
The SMML2CC and SMMETM11CS implement other ARM IP blocks that complement the functionality of ARM processors: These two SMMs are compatible with the SMM1156T2F-S and SMM1176JZF-S, and implemented in an LT-XC2V6000. The SMMs are delivered on a specific platform baseboard. Another Logic Tile is required for full SMM functionality on the latest Versatile baseboards. This Logic Tile FPGA image is not part of the standard deliverable.
SMM-R4F and SMM-A8 are designed for the Emulation Baseboard.
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