Early software development is crucial for the time-to-market of the final product. RealView® Core Generator delivers the complete software development tool-set long before the final silicon or hardware prototypes become available. It's high speed virtual prototypes significantly extend the time available for software development and testing. Models produced by RealView Core Generator are fully compatible with SystemC simulation environments, such as RealView SoC Designer and leading third party debuggers, for full chip architectural exploration and hardware/software integration, reducing the chances of costly design mismatches and chip respins. RealView Core Generator has been extended to enable flexible modeling of complete systems. The new graphical design entry tool allows easy creation and configuration of system platforms, with CPUs as well as system components and peripherals being described in the LISA+ language.
Simulation and Debugging Features Automatic generation of fast and accurate simulation models Unparalleled simulation speed of up to 10 megacycles per second for cycle-accurate and 50 megacycles per second for instruction accurate CPU and system models on popular desktop computers Simultaneous source level debugging of target application code and LISA+ description using the RealView Model Debugger Generated models provide DWARF debug information Automatic generation of the RealView SoC Designer interfaces for system-level analysis and debugging
Analysis Features Automatic instruction tree consistency check Integrated profiling of processor resources, including instruction distribution, resource accesses and pipeline flow Automatic hazard profiling and detection Comprehensive application software profiling for application performance analysis
Options Assembler Generator with macro and symbol handling capabilities (includes low level software tools) RealView Model Debugger Generator for automatic generation of production-level multi-core source level debuggers RealView System Generator with graphical design entry tool for fast system design, generation and simulation Compiler Support Package for automatic retargeting to popular 3rd party C compilers for example the Archelon Compiler
Supported Platforms Tools Generated models Model Debugger Fully automated retargeting Multi-processor support Allows target and source level debug for any processor architecture including VLIW Highlighting of source code from selected disassembly Semi-hosting and profiling support Fully compatible with RealView SoC Designer
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