The APC component is responsible for managing the external Power Management Unit (PMU), which in turn supplies the voltage in the scaled part of the SoC.

The APC receives information about the predicted performance level for the system via the registers contained in the IEC. A corresponding voltage is derived and the external EMU commanded to deliver that voltage via the PowerWise™ Interface (PWI).  Once sustainable voltage point is achieved the Dynamic Clock Generator component is then instructed to change to a corresponding clock frequency.

The APC forms part of a closed-loop voltage control system*. The Hardware Performance Monitor (HPM) analyses in real-time the actual running speed of the digital logic to determine how the current performance level compares with that requested by the IEM software. Any difference is calculated and used to adjust the voltage to achieve the correct performance level. This process takes into account temperature and process variations that exist from the generic characteristic for the silicon used.

The APC can also be used as an open-loop controller. This requires the use of an internal look-up table which contains the frequency and voltage points that are valid for the SoC design. In the case, the HPM is not used and the voltage and frequency are set only once for each performance level requested.

* To use the APC in closed-loop mode requires a PMU which is fully PWI 1.0 compliant. A PWI compliant PMU can be obtained directly from National Semiconductor, or through other PMU manufactures who have licensed the PWI technology. Please contact ARM or National Semiconductor for details of these companies.

PowerWise™ is a trademark of National Semiconductor.