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Adaptive Verification IP

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AMBA® Adaptive Verification IP (AVIP) is the first commercial solution that delivers to the market a single and unified solution for AMBA 3 – AXI SoC Platform Architectural, Performance and Functional Verification.

AVIP Diagram For AMBA based SoC architects, Adaptive Verification IP delivers a unique technology that addresses the increasingly complex challenge of verifying entire on-chip communication systems. AVIP implements a unique engine for extracting, analysing, adapting and applying AMBA® traffic profile information. AVIP enables SoC architects to perform early, low cost and tool independent AMBA-based SoC architecture exploration.

For AMBA SoC verification and implementation teams, Adaptive Verification enhances existing verification methodologies by providing  an exhaustive AMBA 3 AXI performance and functional verification solution that leverages ARM’s experience in designing and validating AXI based IP.

ARM’s AVIP solution contains:

  • Proven AXI protocol deliverables (such protocol checkers, functional coverage points, assertions),
  • Extensible multi abstraction level (Transaction and Channel Level) verification components that can easily be integrated and coordinated in any testbench
  • Advanced (statistical and algorithmic) traffic generators and traffic monitoring capability
  • Live and aggregated AMBA 3 AXI traffic performance metrics
  • Graphical user interface for profiled random verification, profiles and performance analysis

Users can decide to integrate and extend Adaptive Verification IP either as SystemVerilog (verification) or SystemC (architects) objects. The technology is designed for high simulation performances, is tool independent and runs in any main EDA simulator allowing users to leverage Adaptive Verification IP benefits in their existing design flow.

 

AVIP Flow

Adaptive Verification IP advances AMBA SoC verification with a powerful new approach to reduce overall verification time, effort and development risks. Adopting Adaptive Verification IP as a single solution for architecture and verification promotes re-use, decreases development cost and provides a communication and data exchange framework for  architectures and implementation teams, enabling the explosion in SoC size and complexity to continue.

ARM AVIP is currently in beta testing with a number of lead Partners and will be available for general licensing in the first half of '09. For further information please contact us here. 


 

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