ST SPEAr SoC Family

ST SPEAr SoC Family Image (View Larger ST SPEAr SoC Family Image)

Description: STMicroelectronics have introduced a new customizable processor family called SPEAr® (structured processor enhanced architecture). The SPEAr processor supplies a powerful digital engine which will offer the possibility of designing special user functions in a fraction of the time and with low investment. The new family is based on an ARM926EJ-s which maximizes hardware and software performances and includes an advanced bus system and IPs for connectivity and memory interfaces. SPEAr is ideal for all embedded applications and best addresses the following applications; digital engines for printers, scanners.


Silicon Supplier: ST - SPEAr SoC Family


  • Processor: ARM926EJ-S running at 266MHz
  • 32 Kbytes of Instruction cache
  • 16 Kbytes of Data cache
  • 8-Kbyte Data-TCM (Tightly Coupled Memory)
  • 8-Kbyte Instruction-TCM
  • 3 USB2.0 ports (two hosts and one device supporting high speed mode)
  • Ethernet 10/100 MAC
  • 16-channel 8-bit A/D converter
  • I2C interface
  • 3 UARTs
  • SDRAM memory interfaces at 133MHz supporting DDR and SDR
  • SPI interface supporting serial FLASH/ROM
  • 1 full USB-dedicated PLL and one dithered system PLL
  • 200-kgate (ASIC equivalent) of configurable logic connected to four banks of 4 KBytes SRAM each
  • A Real Time Clock
  • Watchdog and 4 general-purpose timers complete the SoC structure
  • Supports a wide range of operating systems, including Linux, Nucleus, uItron, and Vxworks.

Source:  ST Microelectronics


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