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Jasper Design Automation
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Company at a Glance
Headquarters:  Mountain View, California, USA
Year company started:  1999
Number of employees:  50
Privately or publicly held:  Private
Primary solution (product/service):  EDA software solutions for semiconductor design, verification, and reuse, based on the state-of-the-art formal technology.
Markets served:  Worldwide leaders in wireless, consumer, computing, and networking electronics.
ARM technologies supported:  Jasper is used for advanced ARM IP development.
Global Presence:  Sweden, Japan, Brazil
* Connected Community Partner
 
Company Overview

Jasper Design Automation is a privately-held Electronic Design Automation (EDA) company leveraging formal technologies to deliver high value/high ROI solutions for the design and verification of electronic systems and semiconductors. The company's production-proven formal verification solutions have been used on over 100 successful chip projects. System architects, logic designers, verification engineers and silicon bring-up teams are able to successfully prove protocols and executable specs; to design, explore and debug RTL; to ensure correctness of block-level functionality; and for rapid silicon validation and debug. Jasper's newly announced design solution drives greater RTL design quality and designer productivity. It is the first EDA solution for behavior-based RTL analysis and verification by logic designers that also accelerates knowledge transfer, improves design maintenance, and enables efficient reuse. Jasper solutions provide high value to both novice and advanced users.

Company's Primary Business Model?
Jasper technology is employed by leading IC/IP designers worldwide. Jasper's business model includes demonstrating what it likes to call “Targeted ROI:” reducing risks; increasing design, verification and reuse productivity; and accelerating time to market.  Jasper works with the customer to maximize productivity and accelerate profitability.

Company Offerings:
Product name: JasperGold Verification system
Product category: Design Verification

The JasperGold Verification System product family employs state-of-the-art formal verification technology to provide complete systematic verification of design behavior, ensuring correctness in your designs where it matters most. JasperGold delivers competitive advantage across the spectrum of SoC design applications, from architectural analysis, to RTL design and debug, to verification, and low power analysis, to silicon debug and software programmers’ modeling.

Product Name: ActiveDesign:
Product Category: RTL Design:

The ActiveDesign family is a software and services portfolio delivering a dramatic breakthrough in design development, comprehension,  and reuse for internal design blocks, as well as  commercial IP. Innovative Behavioral Indexing technology extracts, indexes and stores relevant design behaviors, along with the RTL, in a dynamic, executable database. Coupled sophisticated Visualization technology, it supports graphical and waveform views of behaviors and dependencies.

Solutions Provided And To Which Markets:
Jasper products address design, verification, and design reuse. Customers include worldwide leaders in wireless, consumer, computing, and networking electronics, with over 100 successful chip deployments.

What Is Unique About Jasper's Solution?
Jasper delivers production-proven solutions to customers.  Formal verification – providing exhaustive proof of the correctness of complex integrated circuits – is a highly complex task.  The broad scope of applications for our software across the design cycle, and our ability to link our technology with our customer’s success, has been the key to Jasper’s successful proliferation.

Company Objective As An ARM Partner:
We work with ARM as a partner and as a vendor of EDA tools, to accelerate the delivery of high quality IP. As John Goodenough, ARM Director of Design Technology, commented, ARM is applying Jasper technology to the design and verification of increasingly sophisticated IP, with a view to increased assurance levels, reduced verification effort, and lower risk and support costs. JasperGold is enabling ARM to address IP development needs through application of formal verification to complex processor designs, utilizing JasperGold’s proof engines as well as productivity enhancers such as advanced visualization, Design Tunneling and Proof Accelerators. Goodenough stated, JasperGold capabilities will assist in proving complex IP such as the ARM Cortex family of products, in reducing the burden of constrained random simulation, and in formalizing IP specifications for new IP. JasperGold is being used by design teams in multiple ARM design centers worldwide.

Additional Information:
ARM Selects Jasper for Formal Verification of IP: http://www.jasper-da.com/newsevents/05192009.htm

 

 
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