16 June 2009

CoWare Speeds Up Optimization Of SoCs Using ARM Amba

CoWare, Inc., a member of the ARM Connected Community, has confirmed the availability of an Interconnect and Memory Subsystem Performance Optimization design flow for CoWare Platform Architect, enabling early and efficient optimization of next-generation system-on-chip (SoC) architectures using ARM AMBA-based virtual platforms.

“This new flow captures the production-proven design methods successfully deployed by CoWare customers to analyze and improve next-generation system performance and cost sooner by using transaction traffic generation, while retaining full support in the same environment for the HW-SW performance validation of early architectural decisions using cycle-accurate processor models and software, as they become available throughout the development process,” said said Johannes Stahl, vice president of marketing and business development at CoWare.  

CoWare virtual platforms for architecture design are the virtualized representation of an electronic system used for the purpose of system-level performance analysis and architecture optimization. The new flow provides system architects with the ability to efficiently capture the dynamic performance workloads of each application subsystem of a multi-function SoC in the form of transaction traffic, months before software is available and with minimum modeling effort using a well-defined, repeatable methodology, the company explained.

CoWare Platform Architect tool and IP model enhancements and CoWare CoStart services are available immediately for use with the 2009.1.1 release.