01 October 2008

IAR Embedded Workbench Optimized For ARM Cortex-M3

IAR Systems has rolled out version 5.20 of IAR Embedded Workbench for ARM, its integrated development environment (IDE) for building and debugging embedded applications, which incorporates a significant number of features focused on the ARM Cortex-M3 core.

“IAR Embedded Workbench for ARM has always been noted for its ease of use, especially for debugging, and for the efficiency of the code it produces, and the latest version 5.20 can only enhance this reputation,” commented Mats Ullström, Product Director of IAR Systems. “With a comprehensive range of ARM cores and devices supports, and evaluation boards available from a wide range of manufacturers, the developer’s needs continue to be our top priority.”

Version 5.20 of IAR Embedded Workbench for ARM incorporates a In the debug area, support has been implemented to handle trace packets sent over the SWO channel which is part of CoreSight, the on-chip debug and trace solution used in the Cortex processor family. The user has full freedom to configure the types of packets that should be displayed by IAR C-SPY debugger. Additionally debug log messages from a print output can be sent over the SWO channel and displayed by IAR C-SPY, without having to halt the execution IAR Systems said.

In addition, execution speed optimizations for the ARM Cortex-M3 core have been strengthened and a multi-file compilation feature allows the compiler to treat several files as one compilation unit which means it can optimize over a larger scope of code according to IAR Systems.

IAR Embedded Workbench for ARM incorporates a highly optimizing ARM compiler supporting C and C++, and provides extensive support for a wide range of ARM devices, hardware debug systems and RTOSs. Generating very compact and efficient code, it also includes ready-made device configuration files, flash loaders and over 1000 example projects. ARM EABI compliance means that the tool is compatible with other ARM EABI compliant compilers. Run-time libraries are provided, including source code, and the compiler features relocating ARM assembler, and linker and librarian tools, as well as the integral C-SPY debugger that features an ARM simulator, JTAG support and support for RTOS-aware debugging on hardware, for which optional IAR J-Link and IAR J-Trace hardware debug probes are available.

Included in the Version 5.20 package is an evaluation edition of IAR PowerPac RTOS, file system, TCP/IP and USB stack bundle. Third party RTOS plugins are also available from IAR Systems and RTOS vendors.