10 June 2008

SoC Speeds Up FPGA Build Using Synopsys ReadyIP

CAST, Inc., a member of the ARM Connected Community, and technical partner SoC Solutions LLC said they have proved the effectiveness of an FPGA design capability from Synopsys’ Synplicity Business Group by developing a complete ARM Cortex-M1 build in just three and a half days.

The system is a typical design that uses an ARM Cortex-M1 processor and includes all the buses and peripherals needed to run embedded software. SoC Solutions’ engineers estimate it took them less than half the time if would normally have taken them to create the system, which they demonstrated recently at the Embedded Systems Conference (ESC).

Synopsys’ ReadyIP program offers the first practical ability to easily acquire and integrate evaluation IP from multiple independent providers and target it to devices from multiple FPGA vendors, according to the company.

Implemented on a Synopsys HAPS-51 high-speed prototyping system, the ESC demo system ran a live software debugging session complete with two-way communication with a laptop PC through a Hyperterm window. The demo exercised the ARM Cortex-M1 processor and a comprehensive set of AMBA buses and peripherals, including the AHB and APB buses, an AHB to APB Bridge, Memory Controllers, Timer, UART, GPIO, PWM, and external FLASH and SRAM memories.