28 March 2008

Mentor Graphics Speeds Validation Of ASICs in Embedded Chips

Mentor Graphics Corporation, a member of the ARM Connected Community, has rolled out Questa Codelinkt, an addition to the Questa Functional Verification Platform designed to speed the validation of ASICs containing one or more embedded processors within the ARM environment.

The Questa Functional Verification Platform combines high performance and high capacity with very comprehensive verification capabilities. The Questa Codelink product is an integrated, source-level debug environment targeting processor driven tests, the company explained.

To advance the use of processor driven test, Mentor has developed Questa Codelink, a rich source-level debugger for RTL processor models supplied by ARM. Codelink employs patent-pending technology which shadows the RTL model and generates a rich debug dataset. By presenting the user with a full view of software variables, call stack, registers, and memory, test failures can be isolated in minutes rather than days or weeks, according to the company.

Codelink supports multi-core debug - tracking multiple code threads and observing message passing via shared memory are key elements in debugging synchronization failures in multi-core systems.

Codelink also has the ability to log batch runs and debug interactively post-simulation, eliminating the need to rerun long simulations in order to debug them. Codelink replays a 15 hour simulation in 3 seconds, yielding highly interactive debug of large simulations. Codelink also supports stepping backwards through source or assembly while variables, memory, and registers views accurately reflect the state of the system.

The Questa Codelink product supports the following ARM families of processors - ARM7, ARM9, ARM11 and ARM Cortex