14 March 2008

Synopsys Unveils Eclypse Low Power Solution

Synopsys, Inc. has announced the Synopsys Eclypse Low Power Solution, a comprehensive suite of proven system-level, verification, implementation and sign-off tools, intellectual property (IP),methodologies and services for low power chip development.

The Eclypse solution aligns the company’s offerings into a streamlined, easy-to-use low power workflow that encompasses each phase of the design process. As a result, the Eclypse solution enables design teams to adopt advanced low power techniques while boosting productivity, reducing risk and ultimately delivering high quality silicon in an effort to meet or beat power, area, speed and yield objectives, Synopsys said.

The Eclypse solution supports the industry-standard Unified Power Format (UPF) language, which is used to capture low power design requirements. The following UPF-enabled tools are included: MVRC and VCS with MVSIM, key components of the Discovery, Verification Platform, and Design Compiler, Power Compiler, IC Compiler, DFT MAX, Formality, and PrimeTime, key components of the Galaxy Design Platform. Completing the solution are additional tools for low power design, including Innovator, HSPICE, HSIM, NanoSim, TetraMAX, and PrimeRail, as well as DesignWare IP and Synopsys Professional Services. The Eclypse solution supports open methodologies, including those described in the "Low Power Methodology Manual" (LPMM), co-authored by Synopsys and ARM.

"ARM has always been at the forefront enabling low power electronic products. Our innovative collaborations with Synopsys have helped advance the state of the art in power management techniques, resulting in enhancements to IP, tools and methodologies that enable mainstream designers to achieve their targets," said John Goodenough, director of Design Technology, ARM. "Synopsys' Eclypse Low Power Solution, together with ARM physical and processor IP, can significantly reduce consumer product power consumption as proven through our numerous silicon technology demonstrators described in the Low Power Methodology Manual [Springer]."

Synopsys will conduct a series of Eclypse Low Power Seminars in which ARM will participate. These seminars are designed to help chip development teams understand how they can employ the latest advanced low power design techniques with the Eclypse solution. The seminars will include an overview of the Eclypse solution and detail key elements of an automated low power design workflow. Synopsys is a member of the ARM Connected Community. For information on a seminar near you, go to: http://www.synopsys.com/eclypse.