19 May 2006

Synopsys & Altera Achieve Silicon Accurate 65nm Designs

Synopsys has confirmed that Altera has deployed its Star-RCXT extraction tool and HSIM Fast Space simulator to achieve silicon accurate 65-nanometer (nm) designs.

The tools will be used in Altera’s FPGA design flow targeting TSMC's 65-nanometer (nm) Nexsys process technology. The Star-RCXT extraction tool offers advanced process modelling of 65-nm effects with accurate correlation to silicon, as well as seamless integration with HSIM simulator to achieve fast time-to-results.

"Adopting the Star-RCXT extraction tool for our 65-nm FPGAs is the logical choice given our successes with it on our 90-nm Stratix devices," said Eugene Chen, director of CAD Engineering at Altera. "We selected the Star-RCXT tool on the merits of its TSMC verification, its proven ability to model 65-nm effects with sub-femtofarad accuracy, and its seamless integration with Synopsys' HSIM FastSpice simulator."

The Star-RCXT tool is the market-leading parasitic extraction solution in Synopsys' Galaxy Design Platform, and the only extraction tool to cover cell-based, custom digital, and analogue/mixed-signal designs. It supports 65-nm process capabilities including in-die process variation solutions such as selective process biasing (spacing- and width-dependent metal bias), local density effects, length of diffusion density and polynomial-based width-dependent thickness variation, width-dependent temperature variation, and metal fill. In modelling such advanced silicon process features, the Star-RCXT tool extracts silicon-accurate resistance capacitance (RC) parasitics for use with the HSIM FastSpice simulator to ensure rapid verification of custom digital designs, the company said.