09 May 2006

Mentor Unveils Next Generation Verification Solution

Mentor Graphics Corporation has rolled out its comprehensive next-generation Questa verification solution.

The company said the solution combines tools, methodology and industry partners formulated to deliver a new level of verification productivity and efficiency to today's designers.

As well as launching the Questa 6.2 functional verification platform, the industry's first open-source standards-based Advanced Verification Methodology (AVM), Mentor Graphics has also announced the Questa Vanguard Program (QVP), an organisation of over 25 companies dedicated to helping companies build more effective verification flows.

"Tools by themselves don't solve problems," said Robert Hum, vice president and general manager of Mentor Graphics Design Verification and Test division. "You need standards, methodologies and an industry infrastructure that can get people up and running quickly with new capabilities. The new Questa solution addresses all of those requirements and is uniquely positioned to accelerate the adoption of the new flows that designers need."

ARM has confirmed it is collaborating with Mentor on a number of items to ensure interoperability between ARM products and Mentor's EDA products. Tim Holden, director of EDA Relations, ARM commented: "As such, our mutual customers will be able to take full advantage of a single kernel SystemVerilog / SystemC verification solution that offers performance and debugging advantages over the multi-tool, multi-language solutions."

The Advanced Verification Methodology (AVM) is the first true system-level-to-RTL verification methodology, according to Mentor Graphics. The AVM integrates advanced verification techniques like constrained-random stimulus, functional coverage and assertions into a single transaction level modeling (TLM)-based framework implemented in both SystemC and SystemVerilog.

Designed from the ground-up to take advantage of the new verification capabilities in SystemVerilog and SystemC, the AVM features an object-oriented coding style to reduce the amount of testbench code and a modular architecture to enable reuse.

The AVM consists of the AVM Cookbook, a "how-to" guide for getting started, and - an industry first - source code for base class libraries, utilities, and implementation examples written in both SystemC and SystemVerilog. The AVM code together with the AVM documentation will be provided under an Apache 2.0 open source license.

The Questa 6.2 verification platform ships in Q2 2006 and includes access to the Advanced Verification Methodology portal. The AVM will also be available in Q2 2006.