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Co-Verification of Hardware and Software for ARM SoC Design
Co-Verification of Hardware and Software for ARM SoC Design Book ImageIn English language, by Jason Andrews
288 pages
published by Newnes
Publication Date: 18 August 2004
ISBN-10: 0-7506-7730-9
ISBN-13: 978-0-7506-7730-1

This book is the first to document and teach important information about the verification technique known as Hardware/Software Co-Verification. Traditional embedded system design has evolved into single chip designs that are pushing past 1M logic gates and headed toward 10M gates. In this era of SoC design, chips now include microprocessors and require software to be developed before hardware fabrication. To effectively develop quality products in a timely manner engineers must be armed with necessary information to make educated decisions about which tools and methodology to deploy. SoC verification requires a mix of expertise from the disciplines of microprocessor and computer architecture, logic design and simulation, and C and assembly language embedded software. Individual books exist in each area, but until now the relevant information and how it all fits together has not been available. The book provides unique, in depth information about how co-verification really works, how to be successful using it, and the pitfalls to avoid.

The book also contains an added bonus. It covers important information about developing and verifying SoC designs using ARM microprocessor cores. In the last few years ARM has achieved a dominant market position in the 32-bit embedded microprocessor space and has become the de facto standard for many market segments. This book illustrates the concepts of HW/SW co-verification using concrete ARM SoC examples and provides useful information about co-verification of designs utilizing an ARM microprocessor.

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