Calibre® PERC™ by Mentor Graphics Corporation

Back End Design

Product Description

Calibre^® PERC™ by Mentor Graphics Corporation

Product Description

Calibre® PERC, Mentor Graphics' newest reliability verification solution is designed to address your advanced circuit verification needs for electrostatic discharge (ESD), electrical overstress (EOS), signals crossing multiple power domains, advanced ERC and other reliability concerns.

Reliability is a growing concern for integrated circuit designers; however, this is an area that could be better served by the electronic design automation industry. In response to this growing need, Mentor Graphics has developed Calibre PERC to address reliability challenges that arise during the circuit and electrical verification process. PERC is specifically designed to perform electrostatic discharge (ESD) and multiple power domain checks.

Calibre PERC allows you to customize ERC checks at the schematic level as well as geometrical and electrical checks at layout, which gives you more power and flexibility to handle emerging circuit verification demands for design implementation.

ESD, advanced ERC, and multiple power domains are top issues on a long list of complex new geometrical and electrical verification requirements. All of these advanced requirements can only be described by a topological view rather than single device/pin to net relation. A topological view incorporates many layout-related parameters as well as circuitry-dependent checks. Calibre PERC is the first industry tool to fulfill these complex verification requirements.

Product Features

• Next Generation Circuit Verification — Calibre PERC provides the capability for advanced circuit verification. It performs necessary checks to address ESD issues, errors arising from designing across multiple power domains, and advanced ERC concerns.
• Improve Design Reliability — Calibre PERC is uniquely capable of verifying complex rules and revealing potential electrical violations that might otherwise result in short-term, long-term or even catastrophic electrical failure.
• Improve Design Accuracy — Device recognition, orientation and symmetry are all important criteria for sensitive circuit configurations. Often, traditional ERC is unable to extend past simple checks. With Calibre PERC providing access not only to its rich verification environment, but also delivering access to the Calibre platform, including Calibre LVS and Calibre DRC, complex device and context aware verification is possibly with simple to debug results and the scalable execution required for today's world-class silicon delivery.

• Improve Runtime — Automated proprietary hierarchical and logic injection technologies provide virtually unlimited design scope with fast runtimes.
• Easy-to-Use and Fully Customizable — Similar to other Calibre products, the Calibre PERC solution uses Mentor's advanced SVRF and TVF (TCL verification) formats, for quick implementation of customized checks to detect electrical design issues. Additionally, Calibre PERC runs on any netlist, either extracted or source-originated.
• Zero Risk Performance, Investment, and Quality — Fully compatible with the Calibre Physical Verification Platform, Calibre PERC integrates easily into existing customer signoff flows.
• Superior Support

Calibre® PERC™

Market Segment(s)

• Embedded
• Enterprise
• Home
• Mobile
• Mobile Computing

Target Platform(s)

• Linux

Physical IP

• DDR I/O (DDRI/II)
• General Purpose I/O (Inline / Staggered)
• Register File Memory Compilers
• Specialty I/O (HSTL, SSTL)
• SRAM Memory Compilers
• Standard Cell Libraries

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