Calibre® nmLVS by Mentor Graphics Corporation

Back End Design

Product Description

Calibre^® nmLVS by Mentor Graphics Corporation

Product Description

Calibre® nmLVS, the market-leading layout vs. schematic physical verification tool, is tightly linked with both Calibre nmDRC and Calibre xRC™ to deliver production-proven device extraction for both physical verification and parasitic extraction. Calibre nmLVS performs a vital function as a member of a complete IC verification tool suite by providing device and connectivity comparisons between the IC layout and the schematic. Calibre's hierarchical processing engine runs Calibre nmLVS, supplying data for modifying the IC design to achieve superior functionality and reliability.

Calibre nmLVS enables accurate circuit verification because it is able to measure actual device geometries on a full-chip for a complete accounting of physical parameters. These precise device parameters supply the information for back-annotation to the source schematic and the comprehensive data for running simulations. In addition to working with Calibre xRC, Calibre nmLVS can also be used with third party parasitic extraction tools.

Calibre nmLVS can now be enhanced with Calibre PERC (Programmable Electrical Rule Checker). With Calibre PERC, you can automate advanced, customer-specific ERCs to eliminate lengthy and error-prone manual checking. PERC recognizes grouped devices that are connected as you describe and measures geometrical data associated with the circuit topology.

Product Features

• Calibre nmLVS continues to lead the market. Preferred by engineers and management for its proven performance, capacity, reliability and debug ease-of-use.
• De­vice recognition accuracy is cru­cial for tape-out success. Calibre nmLVS delivers the trusted device recognition accuracy and timely execution required for world-class silicon delivery.
• Automated proprietary hierarchical and logic injection technologies provide virtually unlimited design scope with fast runtimes. Multi-threaded and distributed CPU processing capabilities ensure future proof scaling on your hardware.
• Calibre nmLVS is ideally suited for processing any size job requiring intricate device parameter extraction, whether it’s an analog/RF design or a multi­million gate IC.
• With thousands of users, Calibre nmLVS sets the standard for reliability and pre­dictability in all operations.
• Calibre nmLVS provides an intuitive and easy-to-use inte­grated design verification debug­ging environment to help you find and fix design issues. Calibre® nmLVS is two to three times faster than traditional layout vs. schematic processes.

Calibre® nmLVS

Market Segment(s)

• Embedded
• Enterprise
• Home
• Mobile
• Mobile Computing

Target Platform(s)

• Linux

Physical IP

• DDR I/O (DDRI/II)
• General Purpose I/O (Inline / Staggered)
• Register File Memory Compilers
• Specialty I/O (HSTL, SSTL)
• SRAM Memory Compilers
• Standard Cell Libraries

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