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Calibre® InRoute™ by Mentor Graphics Corporation



Back End Design

Product Description

Calibre® InRoute by Mentor Graphics Corporation

Product Description

Calibre InRoute enables designers to achieve signoff manufacturing closure during physical design by providing complete integration between the Calibre platform, the industry leader for manufacturing signoff, and Mentor’s award-winning Olympus-SoC place and route system. The full power of the Olympus-SoC and Calibre platforms together improve design quality, eliminate late-stage surprises, and significantly reduce time to closure.

True Calibre Signoff for Faster Time to Closure

Manufacturing signoff is a growing problem at advanced nodes as the number and complexity of design rules and DFM requirements grow. Calibre InRoute uses true Calibre SVRF rule files and DFM models for DRC and DFM analysis within the Olympus-SoC environment. Calibre InRoute reduces the number of iterations required to achieve manufacturing signoff, minimizes engineering cost and enables faster time to market. Calibre InRoute is the only design and verification platform capable of natively invoking Calibre SVRF-driven analysis.

Innovative Architecture for Precision and Flexibility

The innovative Calibre InRoute Open Router architecture allows the Olympus-SoC system to natively invoke Calibre SVRF-based DRC and DFM analysis in the inner loop of the router. The Olympus-SoC search and repair engine and DRC checker have been de-coupled for easy plug and play of either the Olympus DRC engine or the Calibre DRC engine. Any violations that are detected by the Calibre DRC engine can be automatically repaired by the router and incrementally verified with Calibre signoff DRC. This architecture also eliminates the needs for any data transfer as the implementation and the verification engines are tightly integrated with the hosted data model.

Calibre InRoute accesses the full suite of Calibre signoff capabilities—including Calibre nmDRC, Calibre nmLVS, Calibre LFD™, Calibre CMPAnalyzer, Calibre YieldAnalyzer, and Calibre YieldEnhancer.

Calibre Accuracy in Place and Route

Calibre InRoute uses the most accurate and up-to-date signoff design rule files and model-based verification, which eliminates the mismatches between signoff and implementation rules that result in surprise violations found after the layout is complete.

Calibre InRoute also provides on-demand GDSII abstractions, which allows designers to find LVS and DRC problems from mismatches between IP layout views and abstracted views traditionally used in physical design.

Because Calibre InRoute employs Calibre rule files and engines directly, user are ensured that they are meeting the requirements of all major foundries, which use Calibre as their golden signoff tool.

Product Features

  • Native invocation of all Calibre engines during place and route.
  • Automatically detect and repair SVRF-based DRC/DFM violations.
  • Minimize ECO iterations during physical signoff.
  • Eliminate ASCII file transfers between tools.
  • Generate on-demand GDSII model abstraction in the design environment.
  • Easy to adopt into existing flows; no new languages, formats, or interfaces to learn.
  • Tapeout-proven on advanced-node designs.

Calibre® InRoute™

Market Segment(s)

  • Embedded
  • Enterprise
  • Home
  • Mobile
  • Mobile Computing

Target Platform(s)

  • Linux

ARM Processor(s)

  • ARM7EJ-S
  • ARM7TDMI
  • ARM7TDMI-S
  • ARM720T
  • ARM920T
  • ARM922T
  • ARM926EJ-S
  • ARM940T
  • ARM946E-S
  • ARM966E-S
  • ARM968E-S
  • VFP9-S
  • ARM1020E
  • ARM1022E
  • ARM1026EJ-S
  • VFP10
  • ARM1136J-S
  • ARM1136JF-S
  • ARM1156T2(F)-S
  • ARM1176JZ(F)-S
  • ARM11 MPCore
  • Cortex-A15
  • Cortex-A5
  • Cortex-A50
  • Cortex-A53
  • Cortex-A57
  • Cortex-A8
  • Cortex-A9
  • Cortex-M0
  • Cortex-M1
  • Cortex-M3
  • Cortex-M4
  • Cortex-R4
  • Cortex-R5
  • Cortex-R7
  • SC000
  • SC100
  • SC200
  • SC300
  • ARMv4
  • ARMv5
  • ARMv6
  • ARMv7
  • ARMv8
  • StrongARM
  • XScale
  • Mali55
  • Mali-200+GP2
  • Mali-400
  • Mali-T604
  • Other

System IP

  • Debug
  • Interconnect Fabric
  • Level 2 Cache Controller
  • Memory Controller

Physical IP

  • DDR I/O (DDRI/II)
  • General Purpose I/O (Inline / Staggered)
  • Register File Memory Compilers
  • Specialty I/O (HSTL, SSTL)
  • SRAM Memory Compilers
  • Standard Cell Libraries

Security Software

  • TrustZone™ Technology
 
ARM Connected