I2C Master / Slave Controller IP Core, Hs-Mode, Parameterized FIFO, AXI or AHB o by Digital Blocks, Inc.

SoC IP Provider

Product Description

The Digital Blocks DB-I2C-MS-Hs-Mode Controller IP Core interfaces a microprocessor via the AMBA AXI or AHB or APB Bus to an I2C Bus in Hs-mode (3.4 Mbit/s). The DB-I2C-MS-Hs-Mode Controller IP Core can also interface a set of Registers within an ASIC / ASSP / FPGA device as well as interface Memory (e.g. SDRAM / SRAM / FLASH) to an I2C Bus.

The following DB-I2C-MS-Hs-Mode I2C Conroller features offers the highest system-level I2C performance capability on the market: (1) 3.4 Mbit/s Hs-Mode transfer on the I2C Bus: (2) DB-I2C-MS Controller FIFO to hold blocks of data plus an off-load Finite State Machine to manage the transfers; (3) streamline DMA controller to move data from the DB-I2C-MS Controller to System Memory or Registers.

 

 

I2C Master / Slave Controller IP Core, Hs-Mode, Parameterized FIFO, AXI or AHB or APB Bus

Market Segment(s)

• Embedded
• Enterprise
• Home
• Mobile

Target Platform(s)

• Android
• ITRON
• Java
• Linux
• Nucleus
• OpenGL ES
• Palm OS
• QNX
• Symbian
• ThreadX
• VRTX
• Windows Embedded CE
• Windows Mobile

Companion Processor(s)

• Communication
• DSP
• Flash
• I/O
• Multimedia

ARM Processor(s)

• ARM7EJ-S
• ARM7TDMI
• ARM720T
• ARM920T
• ARM922T
• ARM926EJ-S
• ARM940T
• ARM946E-S
• ARM966E-S
• ARM968E-S
• VFP9-S
• ARM1020E
• ARM1022E
• ARM1026EJ-S
• ARM1136J-S
• ARM1136JF-S
• ARM1156T2(F)-S
• ARM1176JZ(F)-S
• ARM11 MPCore
• Cortex-A15
• Cortex-A5
• Cortex-A50
• Cortex-A53
• Cortex-A57
• Cortex-A7
• Cortex-A8
• Cortex-A9
• Cortex-M0
• Cortex-M1
• Cortex-M3
• Cortex-M4
• Cortex-R4
• Cortex-R5
• Cortex-R7
• ARMv4
• ARMv5
• ARMv6
• ARMv7
• ARMv8
• StrongARM
• XScale
• Mali55
• Mali-200+GP2
• Mali-400
• Mali-T604

Security Software

• TrustZone™ Technology

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