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HES-7™ provides SoC/ASIC hardware verification and software validation teams with a scalable and high quality FPGA-based ASIC prototyping solution backed with an industry leading 1-year limited warranty. Each HES-7 board with dual Xilinx® Virtex®-7 2000T has 4 million FPGA logic cells or up to 24 million ASIC gates of capacity, not including the DSP and memory resources.
Architected to allow for easy implementation and expansion using only one or two large FPGAs, rather than multiple low density FPGAs, HES-7 does not require as much labor-intensive partitioning or tool expense. Using a non-proprietary HES-7 backplane connector, HES-7 can easily expand prototype capacity up to 96 million ASIC gates and can include the expansion of daughter boards.
Lowers ASIC Prototyping Cost
By keeping costs lower through operational efficiencies, high volume manufacturing, and a close partnership with Xilinx who brings superior design implementation and debug software to the process at affordable prices, Aldec is able to pass savings on to customers, lowering their overall ASIC prototyping costs.
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