CLP-47: Configurable XTS-AES Core by Elliptic Technologies Inc.
SoC IP ProviderProduct Description
The CLP-47: Configurable XTS-AES core is a silicon proven security engine targeted at rotating and solid state disk applications. The core supports the tweakable narrow-block XTS-AES as specified in the IEEE Std 1619-2007 standard. XTS is defined as the XEX-based Tweaked CodeBook mode (TCB) with CipherText Stealing (CTS) algorithm.
The Configurable XTS-AES Core also integrates seamlessly in ARM-based SOCs and enables designers to efficiently balance: power, performance, and silicon area.
CLP-47: Configurable XTS-AES Core
Market Segment(s)
- Embedded
- Enterprise
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