i.MX6
OBJECTIVES
The course details the hardware implementation of the Freescale i.MX6 SoC.
The course focuses on the boot sequence, the clocking and the power management strategies.
The course explains all parameters that affect the performance of the system in order to easily perform the final tuning.
The multiple complex units involved in multimedia management are covered in depth.
An overview of the Cortex-A9MP core helps to understand issues caused by MMU, cache and snooping.
Interrupt management through ARM GIC is explained through a lab.
The course also covers the hardware implementation, particularly the DDR3 and NAND flash controllers.