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The integration of Veloce and Codelink provides a high-speed, software-driven, hardware verification environment for debugging SoCs that use embedded processors.
During a Veloce emulation run, Codelink's advanced tracing technology automatically captures all of the important activity inside the design's processors, enabling the verification engineer to "playback" the emulation at a later time; thus offloading the Veloce emulator to allow other regression runs to be performed while debugging the results of a previous run.
Innovative debug features include fast forward, rewind, pause, single step, and even the equivalent of zoom-and-pan to make the debug session appear just like an interactive session.
Synchronization between the software code and hardware emulation is maintained and easily viewed, including emulation waveforms, processor states, source code, internal memory, registers, stacks, and output.
Allowing tens or even hundreds of software engineers to access the emulated design data during software debug results in a huge productivity boost and creates a large ROI in Veloce resources.