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While spreadsheets are good for aggregating data, static spreadsheet calculations are not accurate enough to estimate performance and make design decisions. Simulation is needed. Traditional RTL simulation is too slow and lacks the configurability and visibility to analyze performance. In addition, the RTL may simply not be available. Risks include over-design, under-design, cost increases, schedule delays and re-spins.
Synopsys Platform Architect provides architects and system designers with SystemC TLM tools and methods for the efficient design, performance analysis and optimization of multicore SoC architectures. To accelerate architecture design, also take advantage of the Architecture Design Models, and CoStart Enablement Services.
Synopsys Platform Architect is a SystemC TLM standards-based graphical environment for capturing, configuring, simulating, and analyzing the system-level performance of next-generation SoC architectures. Platform Architect enables system designers to explore and optimize the configuration of the SoC infrastructure, specifically the global interconnect and memory subsystem, to achieve the right system performance and cost.
Its efficient turnaround time, powerful analysis views, and available IP models make Platform Architect the premier choice for system-level performance analysis and optimization of ARM AMBA-based SoCs. Platform Architect is a production-proven solution used by leading Systems OEMs and Semiconductor companies worldwide.