SafeXcel™ IP-76 True Random Number Generator by AuthenTec

Product Description

SafeXcel-IP-76: True Random Number Generators

AuthenTec’s True Random Number Generators (TRNG) are typically deployed in semiconductors for secure data communications, secure electronic transactions, and secure data storage.

The TRNGs are designed for compliance with Federal Information Processing Standards (FIPS) Publication 140-2 and 140-3, facilitating system certification to this standard. An American National Standards Institute (ANSI) X9.17 Annex C / ANSI X9.31 Annex A post processor or NIST SP80-900 Deterministic Random Bit Generator is available to meet the FIPS PUB 140-2 and 140-3 requirements.

The TRNG cores can be used for: Key Generation, Initialization Vectors, Generation of Cookies and Nonces or other, non-cryptographic purposes such as: Statistical Sampling, Re-try timers in communications protocols, Noise generation.

The SafeXcel-IP-76 cores are new state-of-the-art design for very fast true random number generation, targeting 65, 45, 40, 28nm and smaller CMOS technologies. It provides semiconductor designers with a silicon-proven solution that has been deployed in AuthenTec’s leading VPN accelerator chips, as well as in several chips manufactured by AuthenTec semiconductor customers.  The SafeXcel-IP-76 implements state of the art reliable Shot Noise oscillator implementation allowing operation across very wide PVT ranges as encountered in modern small-feature size technologies. It offers a configurable number of oscillators to allow a tradeoff between hardware complexity, instantaneous power consumption and entropy generation rate. The default number of 24 generally allows a startup time well below 5 milliseconds. For less demanding applications, standard versions with 8 oscillators are available.

The SafeXcel-IP-76 core family has four members:

• EIP-76a: no post processing
• EIP-76b: 3DES post processing (X9.31 and FIPS140-2)
• EIP-76c: AES-256 post processing (X9.31 and FIPS140-2)
• EIP-76d: SP800-90 DRBG post processing (FIPS140-2 and FIPS140-3)

Security Aware design:

• Patented oscillators test circuits to detect locking to periodic signals
• Repeating output data detection in hardware (FIPS 140-3)
• Secure random data buffer wipe-after-read and zeroize functions (FIPS 140-2/FIPS 140-3)
• Secure reading mode where data is only available on request for a limited time
• Detection of noise source failure in hardware (AIS-31)
• Automatic shut-down on fatal errors
• Continuous noise source randomness monitoring with ‘monobit’/‘poker’/‘run’/‘long runs’ tests (AIS-31) built in hardware
• On-line known-answer tests on post-processor and ‘monobit’/‘poker’/‘runs’ test logic without losing already gathered entropy
• Various off-line integrity and known-answer tests on the oscillator self-test circuits

SafeXcel™ IP-76 True Random Number Generator

Market Segment(s)

• Embedded
• Enterprise
• Mobile Computing

Target Platform(s)

• Android
• Linux

Companion Processor(s)

• Biometrics
• Communication
• Multimedia

ARM Processor(s)

• ARM920T
• ARM922T
• ARM926EJ-S
• ARM940T
• ARM946E-S
• ARM966E-S
• ARM968E-S
• ARM1020E
• ARM1022E
• ARM1026EJ-S
• ARM1136J-S
• ARM1136JF-S
• ARM1156T2(F)-S
• ARM1176JZ(F)-S
• ARM11 MPCore
• Cortex-A15
• Cortex-A5
• Cortex-A8
• Cortex-A9
• ARMv5
• ARMv6
• ARMv7

System IP

• Interconnect Fabric