Genesis by VWorks, a subsidiary of ASTC

ESL Tools

Product Description

Genesis™ is an integrated methodology, flow, and tool framework for creating models of semiconductor intellectual property (IP) blocks and subsystems.  These models can be used in cooperation with the ARM Fast Models.

Genesis™ is designed to be simulation standard independent and support any target user simulator. However, the default target simulator standard supported by Genesis is the SystemC/TLM industry standard by IEEE Standard SystemC 1666™-2005, OSCI SystemC 2.2, and SystemC TLM 2.0.1. The Genesis baseline default flow provides full support for model deployment to both the VLAB OSCAR SystemC/TLM simulation library and the OSCI OSCI SystemC 2.2 reference simulation library.

Genesis

Market Segment(s)

• Enterprise
• Mobile Computing

Target Platform(s)

• Linux

ARM Processor(s)

• Cortex-A53
• Cortex-A57
• ARMv8

 Contact Us