Due to increasing integration of ASICs, more and more of a system is embedded in one chip. At the same time, despite the emergence of ball grid array packaging, I/O pins are increasingly scarce and serial interfacing has become the norm. The result is a lack of observability of internal behaviors that has increased the frustration and delays during validation and debug. Today the issue is partially solved by the addition of ad hoc or simple circuits in the design but the Clarus suite returns the visibility with a systematic solution and in doing so greatly speeds time to market.
Whether it be our super fast implementation of on-chip capture, ultra deep captures or our post compilation, any observed signal, anytime approach, our technology surpasses that delivered by other approaches. The result is a next generation validation and debug solution that smoothly integrates into your existing tool flows and hierarchical, often multi-site design methodologies. Easy to use and quick to learn, it is far faster to deploy than any current solution.
The Clarus Post Silicon Validation Suite saves you the time and cost of designing, implementing, testing, and supporting your own internal solution. The Implementor tool allows design teams to quickly generate an optimized debug infrastructure that works across multiple clock domains while making the best possible use of on-chip resources. In addition, the definition of the embedded instrumentation is automatically passed to be used by your validation team.
The Clarus Suite’s highly configurable ‘Any-Observed-Signal-Anytime’ architecture delivers real-time visibility into a large number of internal signals. Like a logic analyzer, the Analyzer tool provides triggering and control of captures providing the data that you need. The data is decompressed and using associated timing information a single waveform showing ultra long captures is created. You can therefore quickly gain a system understanding and immediately zoom to the bit level view for detailed analysis without recapturing and switching between multiple views at different times. This ability in turn enables a fast understanding of the circuit behavior and the root cause of issues.
Clarus efficiently enables fast determination of the location of any issues, especially useful with imported IP blocks, and greatly speeds time to market.
Clarus Post Silicon Validation Suite