‘Top level’ device I/O multiplexing, specification of core signal to I/O buffer multiplexing algorithms, operational modes and test cell insertion. Fully compatible with large devices such as ARM IP.
I/O Fabric Management
Modern System-on-Chip (SoC) devices typically support multiple static and dynamic operating modes. This can result in thousands of top-level signals that need to be mapped to hundreds of I/O pins according to the target application. Socrates Spinner manages this increasingly complex area by specifying and auto-generating all of the logic associated with the chip I/O layer.
The Problem: Increasing SoC complexity and hardware and software configurability has resulted in functional and test signals that are heavily constrained within a pin-limited package. This leads to extensive sharing of pins for functional and test purposes, and consequently highly complex I/O layer functionality. A single bug in the I/O layer can be fatal, often resulting in a chip respin. Designing and verifying the I/O layer, and communicating I/O information between all stakeholders, has become a full-time task for I/O subsystem teams.
Your Solution: Socrates Spinner is an award-winning tool that specifies the complete I/O layer, auto-generates multiple design views and enables seamless integration of the I/O fabric with the rest of the system. Spinner simplifies and automates the specification and verification of the I/O subsystem, slashing development schedules, enhancing inter-team communications and virtually eliminating the risk of I/O bugs.
Benefits
Reduced development costs through automation of time-consuming, tedious and error-prone tasks
Elimination of I/O bugs with rigorous coherency checks and self-checking testbench
Immediate turnaround time for late I/O changes and management of iterative design flow
Cost-effective commercial replacement for legacy in-house solutions
Efficient reuse of I/O fabric information and accelerated derivative development
Guaranteed quality of design views due to correct-by-construction methodology
Features
Provides a complete I/O solution in a single-source specification
Support for standard formats including IP-XACT, Excel and VHDL / Verilog, in addition to customizable importer technology for customer-specific or legacy formats
Complete I/O data model and comprehensive checks to guarantee data coherency
Data model extension via user-defined properties to support customer-specific data and constructs
Complex I/O cell control including user-defined logic equations
Automatic insertion of test and power isolation logic
Full support for boundary scan cell definition, insertion and interconnection
Support for digital and analog I/O
Suite of I/O-related output view generators including RTL, documentation, IP-XACT and self-checking testbench
Supports customization of standard generators or creation of customer-specific generators
Effective color-coded visualization of multiplexing schemes plus die and package views
Eclipse-based product supporting a powerful and intuitive GUI an d command-line operation; runs on Windows or Linux platforms