ARM’s highest performing processor, extending the capabilities of mobile and enterprise computing. Read More...
System interconnect and RTL generation, specifically generation of connections between ARM (and third party IP) and ARM system interconnect IP such as NIC-301, creation of XML configuration files for/and Interaction with AMBA designer, creation of system and IP TLM models including instantiation and TLM interconnect of ARM fast model with other TLM IP, potential to generate IP and system level verification environments adhering to eVM, OVM or UVM
IP Integration & Chip Assembly
IP reuse and efficient IP integration are essential for successful System-on-Chip (SoC) development. Socrates Weaver is a revolutionary tool for IP integration that is the fastest and most efficient way to build and maintain complex systems. The unique rules-based integration methodology employed by Weaver maximizes the potential for IP, subsystem and system reuse.
The Problem: Most automated IP integration flows are not truly automated. Only a small number of connections – typically well-defined bus interfaces – are automatically supported. The majority of interconnections must be made manually or via low-level scripted commands. This approach offers little or no productivity gains over purely manual flows and has very limited potential for reuse. Managing incremental changes as the system evolves is difficult and time-consuming.
Your Solution: Socrates Weaver has a unique rules-based integration methodology that offers an intuitive, highly automated, scalable solution for IP integration and system assembly. Weaver’s rules are simple, high-level specifications of integration intent. Weaver synthesizes the rules to create the low-level connections. Because of the high level of abstraction, a single rule can result in hundreds, or even thousands, of individual correct-by-construction connections. Rules are simple to understand and review and can be easily shared and reused. Rules can be combined to create more complex structures and stored in libraries that can be used and reused across teams or companies. Weaver can also be used to build and dissolve design hierarchy without disrupting connectivity.
Reduces development costs through automation of time-consuming, tedious and error-prone tasks
Eliminates bugs caused by human error and reduces risk of re-spin
Provides a fast and efficient path to a standardized IP repository
Ensures adherence to project & organisation integration strategy
Enables large-scale reuse of IP and subsystems and accelerated derivative development
Promotes high quality designs through correct-by-construction methodology
Full IP packaging capabilities including IP-XACT interface definitions
User-defined properties to support customer-specific data and constructs
Inheritance of interface definitions and properties for automated IP & subsystem packaging
Supports both rules-based and manual connectivity
High-performance connectivity engine with thousands of connections created in just seconds
Real-time status bar illustrating connectivity progress
Hierarchy manipulation via rules or GUI with no loss of connectivity
Supports import & export of standard formats including IP-XACT, Excel, VHDL & Verilog
Fully customizable suite of hardware, verification and software output generators
Comprehensive suite of coherency checks with click-and-jump navigation to problem
Effective visualization and data filtering to aid design navigation
Eclipse-based product supporting a powerful and intuitive GUI and command-line operation; runs on Windows or Linux platforms