
PowerArtist is Apache’s complete RTL design-for-power platform with fully-integrated advanced analysis and automatic reduction technologies; delivering 10% to 60% or more power savings. Comprehensive and automatic RTL power reduction is not just sequential and combinational clock gating, but is targeted for memory and datapath portions of complex IP and System-on-Chip (SoC) designs. The analysis-driven reduction approach, combined with a powerful yet intuitive user interface, selects and prioritizes power reduction opportunities for maxim power savings in minimum time. PowerArtist-XP’s Visualize-Analyze-Reduce framework delivers predictable power reduction while minimizing impact on area, timing, and functional ECO. By enabling power analysis, power reduction, and design optimization early in the design cycle, PowerArtist helps designers meet power budget requirements and increase the power efficiency of their ICs.