Tweaker-F1 by Dorado Design Automation
RTL (Front End) Tools
Product Description
The key values of the Functional ECO Family are:
1. It automatically compares the old and new RTL, synthesizes, and inserts the ECO logic into post-layout netlist with consideration of timing and physical data.
2. The US patented "Minimum ECO Algorithm" ensures fast and very small size of netlist change.
3. The capability of handling cross-boundary ECO and flattened-design ECO.
Having a chip first-cut-production is no longer an easy target today. Most of the chips today require several cuts of re-spin before going production, for more and more CPU/IP blocks, peripheral, interface are integrated into an complex SOC, such as an ARM based SOC. Tweaker-F1 provides a quick short cut for re-spinning a chip without need of starting over from the beginning. For example, you find a bug or need a minor functional change at the interface between your ARM core and the attached peripheral. Tweaker-F1 let you complete it in minutes, by comparing the old and new RTL, synthesizing, and inserting the ECO logic into the post-layout netlist. Tweaker-F1 equips with the “cross-boundary equivalence checking” engine, so it is capable of handling large, even flattened designs. The technique also enables Tweaker-F1 to handle a netlist produced by advanced synthesis technology such as “resource sharing” and “Clock-Gating Cloning”. Tweaker-F1 Family handles both pre-mask ECO and post-mask ECO.
Market Segment(s)
- Embedded
- Enterprise
- Home
- Mobile
- Mobile Computing
Target Platform(s)
- Linux
ARM Processor(s)
- Cortex-A53
- Cortex-A57
- ARMv8
Physical IP
- SRAM Memory Compilers
- Standard Cell Libraries
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