PowerPro MG by Calypto Design Systems

Product Description

Based on Calypto’s patented Sequential Analysis Technology, PowerPro MG is an automated memory power optimization solution that takes advantage of the low-power control options available in today’s on-chip memories to reduce both dynamic and leakage memory power with little or no impact to timing or area. PowerPro MG reduces dynamic power by automatically generating logic to control the memory enable signal to eliminate unnecessary memory accesses. PowerPro MG reduces leakage power by automatically generating logic to control the sleep modes of individual embedded memories.

PowerPro MG reads in an RTL design and its corresponding memory models and generates new low-power RTL that looks identical to the original RTL with the addition of memory gating logic. The new PowerPro MG generated RTL is comprehensively verified with Calypto’s SLEC Pro. SLEC Pro is a Sequential Logic Equivalence Checking tool that guarantees functional equivalence between the PowerPro MG generated RTL and the original RTL. No other solution provides this combination of automatic memory power optimization and formal verification.

PowerPro MG

Market Segment(s)

• Embedded
• Enterprise
• Home
• Mobile
• Mobile Computing

Target Platform(s)

• Other OS

ARM Processor(s)

• Cortex-A53
• Cortex-A57
• ARMv8

Physical IP

• Register File Memory Compilers
• SRAM Memory Compilers