IP Core NAND Flash Controller by Research Centre Module

SoC IP Provider

Product Description

DMA-Master NAND Flash memory controller
· 8-bit NAND-Flash interface
· Hardware checksum calculation
· Several memory pages transfer per
transaction
· Minimal CPU overhead
· Linux MTD driver

Interfaces
· 8-bit parallel NAND-Flash interface
· 32-bit AMBA AXI Master
· APB Slave for configuration
· Linux MTD drivers are available
Technical characteristics
· Specially designed for high performance with
MTD Drivers Linux subsystem
· Support for 8-bit NAND-Flash chips
· Reading speed up to 40 MB/sec
· Hardware checksum calculation
· Asynchronous DMA-Master interface allows CPU context
switch during transaction, reducing
CPU load
· Bulk read operations are supported to reduce
number of interrupts

List of Deliverables
· Verilog source code
· Verilog test bench and Verification
environment
· Software driver for Linux OS
· Example synthesis scripts
· Documentation

Size
· 50K gates (w/o memory)

IP Core NAND Flash Controller

Market Segment(s)

• Home

Target Platform(s)

• Linux

ARM Processor(s)

• ARM1176JZ(F)-S

System IP

• Interconnect Fabric

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