SpectaReg from PDTi is a collaborative register map
automation tool for software/hardware interface design.
SpectaReg’s web-browser GUI simplifies engineering
workflows, cutting development time and costs. Specifications
are easily captured into the tool and matching hardware logic,
hardware verification, firmware, documentation and more are
all rapidly auto-generated from a single source.
SpectaReg’s streamlined Register Management flow enables
users to:
Develop & manage registers in a rich browser-based interface
Align with IP-XACT XML as the single-source
Auto-generate register code & docs from a central repository
in multiple formats including VHDL, Verilog, SystemVerilog,
C/C++, DITA, HTML, RALF, & more
Grow & scale the methodology across projects, teams,
components, locations & users
Convert legacy register data into IP-XACT XML
Implement any register type & output
Use the native support for ASIC and FPGA on-chip bus
standards/protocols including ARM AMBA AHB and APB