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SystemVerilog FrameWorks™ Template Generator by Paradigm Works, Inc.

ESL Tools

Product Description

The SystemVerilog FrameWorks™ Template Generator (SVF-TG) is a tool
for generating a detailed boilerplate for a VMM or OVM based
verification environment from scratch based on user input.

SystemVerilog FrameWorks™ Template Generator

Market Segment(s)

  • Embedded
  • Enterprise
  • Home
  • Mobile
  • Mobile Computing

ARM Processor(s)

  • ARM7EJ-S
  • ARM7TDMI
  • ARM7TDMI-S
  • ARM926EJ-S
  • ARM946E-S
  • ARM968E-S
  • ARM1136J-S
  • ARM1136JF-S
  • ARM1156T2(F)-S
  • ARM1176JZ(F)-S
  • ARM11 MPCore
  • Cortex-A53
  • Cortex-A57
  • Cortex-A8
  • Cortex-A9
  • Cortex-M0
  • Cortex-M1
  • Cortex-M3
  • Cortex-R4
  • ARMv6
  • ARMv7
  • ARMv8
  • StrongARM
  • XScale
  • Mali55
  • Mali-200+GP2
  • Mali-400

System IP

  • Debug
  • Interconnect Fabric
  • Level 2 Cache Controller
  • Memory Controller

Physical IP

  • DDR I/O (DDRI/II)
  • General Purpose I/O (Inline / Staggered)
  • Register File Memory Compilers
  • Specialty I/O (HSTL, SSTL)
  • SRAM Memory Compilers
  • Standard Cell Libraries
 
ARM Connected