ASIC Design Services by Uniquify Inc.

SoC Design Services or Consulting

Product Description

Uniquify, Inc. is a leading provider of Project-Based and Consulting Services (RTL-Design,
physical design, verification and sign-off), based entirely in Silicon Valley.
Uniquify focuses on 65nm and 40nm process technologies supporting all the
popular foundries including TSMC, Chartered Semiconductor (Common Platform)
and UMC. Our design experts go the extra mile to implement your ASIC designs, IP
and customized DDR memory subsystems ensuring your stringent power, clocking,
IP integration, and performance requirements are met on-time, on-spec and under
budget.

Uniquify’s Services Include:

Logic Design and Verification
 RTL Design
 Logic Verification / Synthesis
 Static Timing Analysis
 DFT Test Insertion

Physical Implementation and Verification
 Place & Route
 Physical Synthesis & Optimization
 Parasitic Extraction
 Signal Integrity / IR-Drop Analysis
 Yield Optimization
 Formal Verification
 Physical Verification (LVS/DRC/ANT/ERC)
 ASIC flow methodology consulting services

65nm / 40nm / 32nm / 28nm Expertise
 Multi-Vt / Multi-Vdd Methodology
 Dynamic on / off power domain
 Module-level Clock Gating
 Integrated Clock Gating (ICG)
 Signal Integrity Prevention & Analysis
 High Speed Interface Timing (DDR / DDR2 / DDR3)
 High Performance Clock Architectures
 STA with IR-drop and SI Analysis and Optimization
 Redundant Via Insertion / Dummy Metal-Fill
 IR-drop Driven Power Planning
 STA with Temperature Inversion Effect

Proven Methodologies
 Ultra Low Power Methodology
 OCV-driven block-level and top-level CTS Methodology
 Multi-Vt Driven Methodology
 Full / Partial Hierarchical Implementation Methodology

Perseus™ Unquify’s Proven Design Methodology

Uniquify has developed a customer proven automated design flow, Perseus™, which
enables predictable tape-out schedules and reduces the risk of today’s most
complex SoC designs. Perseus™ seamlessly integrates various customer design
environments, including Cadence, Synopsys, Magma and Mentor Graphics.
Structured library and design reviews identify and correct common design or flow
problems proactively, before implementation, which improves efficiency and quality
of results. This unique design methodology has proven to shorten design cycles
while ultimately ensuring first time working silicon through a predictable, more
convergent design flow.

ASIC Design Services

Market Segment(s)

• Embedded
• Enterprise
• Home
• Mobile
• Mobile Computing

ARM Processor(s)

• ARM720T
• ARM926EJ-S
• ARM946E-S
• ARM1176JZ(F)-S
• ARM11 MPCore
• Cortex-A53
• Cortex-A57
• ARMv8

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