PureSpec(TM) Verification IP for Chip Interfaces by Denali Software, Inc. (part of Cadence)

Product Description

PureSpec is one of the most complete verification IP for validating compliance with complex interface protocols. PureSpec supports all SoC interface standards, including: AMBA (AXI, AHB, APB), CE-ATA, DFI, Ethernet, PCI Express 1.1, 2, 3.0 + IOV, PLB 4/6, Serial ATA, SDIO (Host) and USB 2.0/OTG/3.0. PureSpec leverages Denali's proven verification IP architecture to provide quality, performance, and EDA tool integration. For modeling, traffic generation, and compliance checking, PureSpec is a robust solution.

Key Features:
- Models all aspects of the protocol
- Built-in assertions library to check protocol rules
- Shadow-reference model of DUT
- Configurable based on Denali SOMA™ language
- Programmable data/traffic generation
- Cumulative functional coverage reports
- Error injection, detection
- Transaction history database
- Sophisticated scoreboarding
- Extensible callbacks, callforwards
- C-based architecture for highest performance

PureSpec leverages a proven C-based architecture specifically designed to address modeling and verification of standard interfaces in a wide range of design and verification flows. All PureSpec products are directly integrated into all popular EDA languages and verification environments.

PureSpec(TM) Verification IP for Chip Interfaces

Market Segment(s)

• Embedded
• Enterprise
• Home
• Mobile

ARM Processor(s)

• ARM7EJ-S
• ARM7TDMI
• ARM7TDMI-S
• ARM720T
• ARM920T
• ARM922T
• ARM926EJ-S
• ARM940T
• ARM946E-S
• ARM966E-S
• ARM968E-S
• VFP9-S
• ARM1020E
• ARM1022E
• ARM1026EJ-S
• VFP10
• ARM1136J-S
• ARM1136JF-S
• ARM1156T2(F)-S
• ARM1176JZ(F)-S
• Cortex-A53
• Cortex-A57
• SC100
• SC200
• ARMv8
• StrongARM
• XScale

System IP

• Interconnect Fabric