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G.729AB speech codec was standardized by ITU-T in 1996. The codec operates on each 10ms frame of 16-bit speech signals sampled at 8 KHz and generates a compressed bit-stream of 8 kbps. It has a look-ahead delay of 5 ms and uses conjugate-structure algebraic code excited linear prediction (CS-ACELP) algorithm for compression. Annex A of the standard specifies a low complexity version and Annex B specifies a voice activity detection (VAD) algorithm as well the discontinuous transmission mode of operation. In 2005, ITU-T extended the Annex-B to provide additional options for the VAD algorithm. The decoder supports an inherent packet loss concealment algorithm. The codec is widely used in VoIP applications.
Salient features (of CouthIT implementation):
Based on ITU-T specification.
Optimized ASM/C implementation.
Operates on speech signals sampled at 8 KHz.
Support for 8 kbps bit-rate.
Support for RTP payload format as specified in RFC 3551.
Supports integrated DTX mode of operation configurable at init-time.
Support for all the three VAD algorithms, configurable at init-time.
Supports integrated Packet Loss Concealment (PLC) algorithm.
Support for bad frame indication at frame boundary.
The implementation supports both Little-Endian and Big-Endian.
Optional support for xDM APIs.
Scope of Testing:
Tested for bit-exactness with standard as well as a large database of non-standard test vectors.
Module is fully interruptible.
Tested for any illegal memory access by the module.
Tested for compliance with register preservation requirements.
Tested for Input buffer corruption.
Tested for I/O buffer alignment requirements.
Tested for multi-instance implementation.
Tested for 100% code coverage.
Range validation for all the API parameters.
Tested with scratch contamination at frame boundaries.
Tested for packet loss conditions with 5% loss to 25% loss.
ARM implementation validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.
The product is ready for evaluation.
For most current information on the performance specifications and availability of the implementation on various ARM cores, please send in your enquiry to firstname.lastname@example.org