CADENCE INCISIVE VERIFICATION IP (VIP) by Cadence Design Systems

Product Description

CADENCE INCISIVE VERIFICATION IP (VIP)
RTL (Front End) Tools

Product Description
CADENCE INCISIVE VERIFICATION IP (VIP)

To maximize quality, predictability, and productivity, engineers need reusable verification IP that spans block to chip to system levels and to derivative projects. Cadence® Verification IP (VIP) uniquely automates and speeds compliance verification using the Compliance Management System (CMS). The CMS is metric driven to ensure easy interpretation and reporting of simulation results.


Incisive Verification IP
Supports advanced testbenches, transaction-based acceleration for high-level testbenches, assertion-based VIP for formal, simulated, and accelerated block-level verification, and emulation and in-circuit verification. Available for a wide range of complex protocols (PCI Express, AMBA, USB, OCP, Ethernet, and more). OVM-compliant and supports a variety of IEEE-standard languages.
Cadence® Incisive® Verification IP (VIP) delivers one of the industry's broadest and deepest VIP portfolio, proven on well over 2,000 verification projects. It supports more than 30 protocols, including the most commonly requested ones such as PCI Express, AMBA AHB and AXI, Ethernet, USB, MIPI, OCP, and SATA, meaning that Cadence offers one of the greatest selection of VIP available. And with 8+ years of expertise and success in VIP creation and deployment, Cadence provides users one of the widest choices to meet their verification predictability, productivity, and quality needs.

CADENCE INCISIVE VERIFICATION IP (VIP)

Market Segment(s)

• Embedded
• Enterprise
• Home
• Mobile

ARM Processor(s)

• Cortex-A53
• Cortex-A57
• ARMv8

System IP

• Interconnect Fabric